GPU-Accelerated Quantum Simulation: Empirical Backend Selection, Gate Fusion, and Adaptive Precision

Abstract

Classical simulation of quantum circuits remains indispensable for algorithm development, hardware validation, and error analysis in the noisy intermediate-scale quantum (NISQ) era. However, state-vector simulation faces exponential memory scaling, with an n-qubit system requiring O(2^n) complex amplitudes, and existing simulators often lack the flexibility to exploit heterogeneous computing resources at runtime. This paper presents a GPU-accelerated quantum circuit simulation framework that introduces three contributions: (1) an empirical backend selection algorithm that benchmarks CuPy, PyTorch-CUDA, and NumPy-CPU backends at runtime and selects the optimal execution path based on measured throughput; (2) a directed acyclic graph (DAG) based gate fusion engine that reduces circuit depth through automated identification of fusible gate sequences, coupled with adaptive precision switching between complex64 and complex128 representations; and (3) a memory-aware fallback mechanism that monitors GPU memory consumption and gracefully degrades to CPU execution when resources are exhausted. The framework integrates with Qiskit, Cirq, PennyLane, and Amazon Braket through a unified adapter layer. Benchmarks on an NVIDIA A100-SXM4 (40 GiB) GPU demonstrate speedups of 64x to 146x over NumPy CPU execution for state-vector simulation of circuits with 20 to 28 qubits, with speedups exceeding 5x from 16 qubits onward. Hardware validation on an IBM quantum processing unit (QPU) confirms Bell state fidelity of 0.939, a five-qubit Greenberger-Horne-Zeilinger (GHZ) state fidelity of 0.853, and circuit depth reduction from 42 to 14 gates through the fusion pipeline. The system is designed for portability across NVIDIA consumer and data-center GPUs, requiring no vendor-specific compilation steps.

Figures (6)

• Figure 1: System architecture of the GPU-accelerated quantum circuit simulator. Circuits enter through framework-specific adapters, pass through the circuit optimizer for gate fusion and precision selection, and are executed on the empirically selected backend. The memory manager monitors GPU resources throughout execution.
• Figure 2: Flowchart of the empirical backend selection procedure. Cached results bypass the benchmark phase; otherwise, available backends are profiled and compared by projected execution time.
• Figure 3: Execution time comparison for a 20-qubit random circuit across three backends. CuPy provides the lowest execution time, followed by PyTorch-CUDA and NumPy-CPU.
• Figure 4: Execution time vs. qubit count on a logarithmic scale. All backends exhibit the expected exponential scaling $\mathcal{O}(2^n)$, but GPU backends maintain a consistent multiplicative advantage over CPU-based execution.
• Figure 5: Speedup factor achieved by DAG-based gate fusion for three benchmark circuits on the CuPy backend with 20 qubits. The VQE ansatz circuit, which contains long sequences of single-qubit rotations, benefits most from fusion.