High-power Test and System Integration of Direct RF Sampling Based LLRF Control and Monitoring System for S-Band Accelerating Structures

Abstract

High precision Low-level RF (LLRF) control and monitoring systems for future particle accelerators will be a significant technical challenge as the requirements in performance, flexibility and affordability become increasingly stringent. We have developed an RF system-on-chip (RFSoC) based next-generation LLRF (NG-LLRF) for S-band accelerating structures, which samples and synthesizes the RF pulses directly without the analog mixers used for traditional LLRF systems. The platform delivered considerably better performance than the requirements of the targeted applications, such as the upgrades for Next Linear Collider Test Accelerator (NLCTA) and test facilities at SLAC. As part of the upgrade program, we also developed a custom solid-state amplifier (SSA) to deliver RF pulses at the desired power level of the klystron. Integration of the LLRF with the SSA and the high-power test facility could be challenging. The power levels and RF pulse stability at each stage of the high-power RF drive system must be optimized to deliver the desired RF performance. In this paper, the integration procedure and the test and characterization results at each stage of integration will be summarized, analyzed and discussed. This integration is an essential step for the full deployment of the NG-LLRF system to test facilities and accelerators in different frequency bands.

Figures (7)

• Figure 1: The front panel of the NG-LLRF chassis with 8 RF inputs and 8 RF outputs.
• Figure 2: The setup for testing the peak RF power of SSA.
• Figure 3: The input RF power versus output RF power of the SSA.
• Figure 4: Pulse top fluctuation with 2 $\mu$s wide pulse at two different input power levels.
• Figure 5: Pulse top fluctuation with 5 $\mu$s wide pulse at two different input power levels.