Efficient Parallel Compilation and Profiling of Quantum Circuits at Large Scales

Abstract

Compiling quantum circuits is a major bottleneck in quantum computing, and given the scale required in a few years, is likely to become infeasibly long. Techniques to reduce compilation time for quantum circuits are sorely needed. Furthermore, resources to test acceleration techniques are similarly lacking due to the limited scale of circuits in benchmark suites and mismatches in characteristics of these circuits and those produced by random circuit generators. This paper resolves the latter of these problems by describing a random circuit generator which allows control of circuit density, width and depth parameters. This is used to derive 8000 experimental large-scale circuits and test a novel approach to compiler parallelisation. This separates a circuit into sub-circuits which are compiled in parallel and recombined to produce a compiled circuit. When the parallel approach was tested using Qiskit, a peak speedup of 15.56 was achieved with corresponding overheads of less than 1%.

Figures (29)

• Figure 1: a) Scatter chart illustrating the depth and width statistics for 5 benchmark suites with gate density. b) Box plot illustrating the density distribution of the 5 benchmark suites.
• Figure 2: Compilation times for quantum circuits of varying depth, width and gate density.
• Figure 3: Speedup & Overhead Variation with Number of Processors (Random Circuits, SabreSwap).
• Figure 4: Speedup Heat Maps for 100% Density Random Circuits using SabreSwap.
• Figure 5: SWAP Overhead Heat Maps for 100% Density Random Circuits using SabreSwap.