Can an Actor-Critic Optimization Framework Improve Analog Design Optimization?

Abstract

Analog design often slows down because even small changes to device sizes or biases require expensive simulation cycles, and high-quality solutions typically occupy only a narrow part of a very large search space. While existing optimizers reduce some of this burden, they largely operate without the kind of judgment designers use when deciding where to search next. This paper presents an actor-critic optimization framework (ACOF) for analog sizing that brings that form of guidance into the loop. Rather than treating optimization as a purely black-box search problem, ACOF separates the roles of proposal and evaluation: an actor suggests promising regions of the design space, while a critic reviews those choices, enforces design legality, and redirects the search when progress is hampered. This structure preserves compatibility with standard simulator-based flows while making the search process more deliberate, stable, and interpretable. Across our test circuits, ACOF improves the top-10 figure of merit by an average of 38.9% over the strongest competing baseline and reduces regret by an average of 24.7%, with peak gains of 70.5% in FoM and 42.2% lower regret on individual circuits. By combining iterative reasoning with simulation-driven search, the framework offers a more transparent path toward automated analog sizing across challenging design spaces.

Figures (5)

• Figure 1: Example of interactions between our actor and critic components over rounds during analog sizing optimization. Our framework defines a closed-loop optimization process that alternates between proposal, audit, search, and reflection.
• Figure 2: An overview of our actor–critic optimization framework (ACOF). At each time step, $n$, the actor proposes a candidate search region $\tilde{\Omega}_n$, the critic adjusts it to a PDK-legal region $\Omega_n^{+}$, BO selects candidates $x \in \Omega_n^{+}$ for simulation, and simulator outcomes are summarized into $e_n$ for the next round. ACOF is agnostic to the specific choice of BO.
• Figure 3: UMAP projections of the sizing parameters illustrate how the design space was explored over optimization rounds. To aid visualization, we outlined regions being explored in the current rounds in red and rendered the cumulative explored designs from past rounds in gray. ACOF judiciously explores the design space by targeting regions corresponding to high performance--as indicated by the higher round-wise Avg and Max FoM. Our technique successfully explored the regions above $\texttt{UMAP Component 2} > 1$. On the other hand, the Single-LLM and Pure-BO baselines were apprehensive to exploration and achieved worse FoMs.
• Figure 4: The circuit schematics of our benchmarks. For an OpAmp, gain, bandwidth, phase margin, and power are coupled design specifications. Higher DC gain can introduce additional poles; this affects phase margin. Also, improving UGBW usually requires a higher bias current and increases power. Since low power is desirable, the circuit must balance gain, UGBW, and power, while phase margin sets the stability constraint and often trades off with frequency response and bandwidth.
• Figure 5: Exponentially-smoothed FoM trajectories for the 180nm 21-parameter folded-cascode benchmark using variants of GPT as the LLM. Subcaptions report the across-run mean of the per-run top-10 mean FOM. Optimization steps for the LLM-based methods begin at 200 because both are initialized with $\mathcal{C}_0 = 200$ seed designs generated by Pure-BO. After initialization, the LLM-based methods update the optimization ranges every 100 steps.