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Mixed-signal implementation of feedback-control optimizer for single-layer Spiking Neural Networks

Jonathan Haag, Christian Metzner, Dmitrii Zendrikov, Giacomo Indiveri, Benjamin Grewe, Chiara De Luca, Matteo Saponati

Abstract

On-chip learning is key to scalable and adaptive neuromorphic systems, yet existing training methods are either difficult to implement in hardware or overly restrictive. However, recent studies show that feedback-control optimizers can enable expressive, on-chip training of neuromorphic devices. In this work, we present a proof-of-concept implementation of such feedback-control optimizers on a mixed-signal neuromorphic processor. We assess the proposed approach in an In-The-Loop(ITL) training setup on both a binary classification task and the nonlinear Yin-Yang problem, demonstrating on-chip training that matches the performance of numerical simulations and gradient-based baselines. Our results highlight the feasibility of feedback-driven, online learning under realistic mixed-signal constraints, and represent a co-design approach toward embedding such rules directly in silicon for autonomous and adaptive neuromorphic computing.

Mixed-signal implementation of feedback-control optimizer for single-layer Spiking Neural Networks

Abstract

On-chip learning is key to scalable and adaptive neuromorphic systems, yet existing training methods are either difficult to implement in hardware or overly restrictive. However, recent studies show that feedback-control optimizers can enable expressive, on-chip training of neuromorphic devices. In this work, we present a proof-of-concept implementation of such feedback-control optimizers on a mixed-signal neuromorphic processor. We assess the proposed approach in an In-The-Loop(ITL) training setup on both a binary classification task and the nonlinear Yin-Yang problem, demonstrating on-chip training that matches the performance of numerical simulations and gradient-based baselines. Our results highlight the feasibility of feedback-driven, online learning under realistic mixed-signal constraints, and represent a co-design approach toward embedding such rules directly in silicon for autonomous and adaptive neuromorphic computing.
Paper Structure (11 sections, 2 equations, 3 figures, 1 table)

This paper contains 11 sections, 2 equations, 3 figures, 1 table.

Figures (3)

  • Figure 1: Schematic of the computational primitive. One output neuron (black) receives inputs (black arrow) and sends output (blue arrows) to the two corresponding positive (purple) and negative (cyan) control neurons. Arrows and circles indicate excitation and inhibition, respectively.
  • Figure 2: a) In-the-loop (ITL) training setup. b Left: Calibration of input and target spike generation with recorder neurons, before and after calibration. Middle: Frequency-frequency curves of calibrated DYNAP-SE neurons for different synaptic weights (see legend). Right: relation between error (output activity minus target activity) and the total feedback (activity of the control neurons) in Hz.
  • Figure 3: Successful ITL training with the DYNAP-SE.a) Binary classification task. b) Target error during ITL training and comparison with numerical simulations. SNN-SFC stands for Spiking Neural Network - Spiking Feedback Control. c) Left: Activity of the output neuron during ITL training when given inputs from class 1 and 2 (see legend). Right: Dynamics of the input weights. d) Poisson encoding of the Yin Yang dataset. e) Same as b for classification accuracy. ANN-BP stands for Artificial Neural Network - Backpropagation. f) Left: Network inference at test time. Right: Dynamics of the input weights.