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KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits

Peng Xu, Yapeng Li, Tinghuan Chen, Tsung-Yi Ho, Bei Yu

Abstract

Digital circuits representation learning has made remarkable progress in the electronic design automation domain, effectively supporting critical tasks such as testability analysis and logic reasoning. However, representation learning for analog circuits remains challenging due to their continuous electrical characteristics compared to the discrete states of digital circuits. This paper presents a direct current (DC) electrically equivalent-oriented analog representation learning framework, named \textbf{KCLNet}. It comprises an asynchronous graph neural network structure with electrically-simulated message passing and a representation learning method inspired by Kirchhoff's Current Law (KCL). This method maintains the orderliness of the circuit embedding space by enforcing the equality of the sum of outgoing and incoming current embeddings at each depth, which significantly enhances the generalization ability of circuit embeddings. KCLNet offers a novel and effective solution for analog circuit representation learning with electrical constraints preserved. Experimental results demonstrate that our method achieves significant performance in a variety of downstream tasks, e.g., analog circuit classification, subcircuit detection, and circuit edit distance prediction.

KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits

Abstract

Digital circuits representation learning has made remarkable progress in the electronic design automation domain, effectively supporting critical tasks such as testability analysis and logic reasoning. However, representation learning for analog circuits remains challenging due to their continuous electrical characteristics compared to the discrete states of digital circuits. This paper presents a direct current (DC) electrically equivalent-oriented analog representation learning framework, named \textbf{KCLNet}. It comprises an asynchronous graph neural network structure with electrically-simulated message passing and a representation learning method inspired by Kirchhoff's Current Law (KCL). This method maintains the orderliness of the circuit embedding space by enforcing the equality of the sum of outgoing and incoming current embeddings at each depth, which significantly enhances the generalization ability of circuit embeddings. KCLNet offers a novel and effective solution for analog circuit representation learning with electrical constraints preserved. Experimental results demonstrate that our method achieves significant performance in a variety of downstream tasks, e.g., analog circuit classification, subcircuit detection, and circuit edit distance prediction.
Paper Structure (21 sections, 6 theorems, 31 equations, 7 figures, 5 tables)

This paper contains 21 sections, 6 theorems, 31 equations, 7 figures, 5 tables.

Table of Contents

  1. Introduction
  2. Related Work and Preliminaries
  3. Graph Neural Networks (GNNs)
  4. Analog Representation Learning (ARL)
  5. Method
  6. Electrically-Simulated Async Message Passing
  7. Electrically Equivalent Contrastive Learning
  8. Experiments
  9. Experimental Setup
  10. Experimental Results
  11. Ablation Studies
  12. Conclusion
  13. Acknowledgments
  14. Appendix
  15. The Introduction of GNNs
  16. ...and 6 more sections

Key Result

Theorem 1

The original graph is a bipartite graph where edges only exist between devices and nets. Assume voltage and ground nodes are special devices added to the graph: 1. Voltage nodes have only outgoing edges with connected nets; 2. Ground nodes have only incoming edges with connected nets. The converted

Figures (7)

  • Figure 1: $\Delta\Sigma$ analog-to-digital converter (ADC), a typical analog circuit type.
  • Figure 2: Directed acyclic circuit graph representation: (1) analog circuit; (2) convert bipartite graph representation (left) to DAG via topology sorting (right); (3) electrically-simulated asynchronous message passing scheme.
  • Figure 3: The framework of the physics-guided contrastive learning scheme, named the KCL Loss
  • Figure 4: The illustration of the downstream tasks: (1) Analog circuit classification; (2) Analog subcircuit detection; (3) Analog GED preidction.
  • Figure 5: The averaged and normalized performance comparison on the analog circuit GED prediction task.
  • ...and 2 more figures

Theorems & Definitions (12)

  • Definition 1: Device
  • Definition 2: Net
  • Definition 3: Analog Circuit Graph
  • Theorem 1: Alicyclic Guarantee after Conversion
  • Theorem 2: Kirchhoff's Current Law preservation
  • Corollary 1
  • Theorem 3: Alicyclic Guarantee after Conversion
  • Proof 1
  • Theorem 4
  • Proof 2
  • ...and 2 more