Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

Assessment of Analog Time Multiplexing in SDM Digital to Analog Converters

Alfredo P. Vega-Leal, Jose L. Mora

Abstract

Analog multiplexing for sigma delta modulated Digital to Analog Converters has been recently proposed as a means of achieving robustness. This preprint analyses said scheme via simulations. The main limitation introduced by the proposed architecture comes from mismatch in the DACs gain, which can drastically impact performances. A new technique of dynamic elements matching is proposed here to overcome this problem.

Assessment of Analog Time Multiplexing in SDM Digital to Analog Converters

Abstract

Analog multiplexing for sigma delta modulated Digital to Analog Converters has been recently proposed as a means of achieving robustness. This preprint analyses said scheme via simulations. The main limitation introduced by the proposed architecture comes from mismatch in the DACs gain, which can drastically impact performances. A new technique of dynamic elements matching is proposed here to overcome this problem.
Paper Structure (7 sections, 4 equations, 9 figures)

This paper contains 7 sections, 4 equations, 9 figures.

Table of Contents

  1. Introduction
  2. Analyzed DAC Concept
  3. Effects of mismatches
  4. Dynamic element matching
  5. The case of multibit DACs
  6. Errors produced by the shape of the pulses
  7. Conclusion

Figures (9)

  • Figure 1: a) Output stage of the SDM based DAC and b) the equivalent discrete-time model.
  • Figure 2: Example of the activation sequence of the DACs.
  • Figure 3: Implementation of the DWA for the $m$-th DAC.
  • Figure 4: Spectra of the proposed architecture with a mismatch of 5.2%.
  • Figure 5: DR graph for the 3-bit quantizer, $M=4$ and a 4 % mismatch: a) ideal, b) with mismatch and without DWA, and c) with mismatch and DWA.
  • ...and 4 more figures