Chipmunq: A Fault-Tolerant Compiler for Chiplet Quantum Architectures

Abstract

As quantum computing advances toward fault-tolerance through quantum error correction, modular chiplet architectures have emerged to provide the massive qubit counts required while overcoming fabrication limits of monolithic chips. However, this transition introduces a critical compilation gap: existing frameworks cannot handle the scale of fault-tolerant quantum circuits while managing the noisy, sparse interconnects of chiplet backends. We present Chipmunq, the first hardware-aware compiler for mapping and routing fault-tolerant circuits onto modular architectures. Chipmunq employs a quantum-error-correction-aware partitioning strategy that preserves the integrity of logical qubit patches, preventing prohibitive gate overheads common in general-purpose compilers. Our evaluation demonstrates that Chipmunq achieves a 13.5x speedup in compilation time compared to state-of-the-art tools. By incorporating chiplet constraints and defective qubits, it reduces circuit depth by 86.4% and SWAP gate counts by 91.4% across varying code distances. Crucially, Chipmunq overcomes heterogeneous inter-chiplet links, improving logical error rates by up to two orders of magnitude.

Figures (9)

• Figure 1: Example of the compilation process in which a quantum circuit is converted into FT form targeting a quantum chiplet architecture.
• Figure 2: Comparison of compiling a single surface code patch by LightSABRE ibm_sabre, MECH mech, and QECC-Synth qecc_synth compilers. (a) Compilation runtime with runs exceeding $10^3$ s reported as timeouts (T/O). (b) Two-qubit gate overhead introduced when compiling to a monolithic backend. (c) Number of two-qubit gates executed over inter-chiplet connections when compiling to a chiplet backend.
• Figure 3: Overview of Chipmunq. Our modular approach integrates with Qiskit and supports circuit-level and QEC-specific simulations.
• Figure 4: Chipmunq's workflow given a step-by-step example. An example input circuit is compiled to a chiplet backend, where each chiplet is assigned one or multiple patches.
• Figure 5: Example usage of PlacePartition and PlacePartitionRelative used in Algorithm \ref{['alg:implementation_mapping']} for placing differently sized partitions on a single chiplet containing defective qubits. (a) Size-aware variant for placement of the first partition. (b) Placement of partitions that interact with each other. (c) Placement of partitions of different sizes in the presence of defective qubits. Green zones indicate successfully allocated partitions, red outline presents unsuccessful placements, and blue zones represent available regions.