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Invited: Toward Accurate, Large-scale Electromigration Analysis and Optimization in Integrated Systems

Sachin S. Sapatnekar

Abstract

Electromigration, a significant lifetime reliability concern in highperformance integrated circuits, is projected to grow even more important in future heterogeneously integrated systems that will service higher current loads. Today, EM checks are primarily based on rule-based methods, but these have known limitations. In recent years, there has been remarkable progress in enabling fast EM computations based on more accurate physics-based models, but such methods have not yet moved from research to practice. This paper overviews physics-based EM models, contrasts them with empirical models, and outlines several open problems that must be solved in order to enable accurate physics-based and circuit-aware EM analysis and optimization in future integrated systems.

Invited: Toward Accurate, Large-scale Electromigration Analysis and Optimization in Integrated Systems

Abstract

Electromigration, a significant lifetime reliability concern in highperformance integrated circuits, is projected to grow even more important in future heterogeneously integrated systems that will service higher current loads. Today, EM checks are primarily based on rule-based methods, but these have known limitations. In recent years, there has been remarkable progress in enabling fast EM computations based on more accurate physics-based models, but such methods have not yet moved from research to practice. This paper overviews physics-based EM models, contrasts them with empirical models, and outlines several open problems that must be solved in order to enable accurate physics-based and circuit-aware EM analysis and optimization in future integrated systems.
Paper Structure (19 sections, 21 equations, 9 figures)

This paper contains 19 sections, 21 equations, 9 figures.

Figures (9)

  • Figure 1: (a) Cross section of a Cu wire indicating the back-stress and the electron wind force vivek:dac. (b) Atomic diffusion paths in a copper interconnect.
  • Figure 2: Potential void locations for AC EM.
  • Figure 3: A two-segment interconnect, where the segment current densities are $j$ and $2j$; current directions correspond to electron current. Due to stress accumulation, the steady-state stress in the segment with lower current density has a higher positive tensile stress (which can nucleate a void).
  • Figure 4: A multisegment interconnect line with different current densities in each segment and potentially nonuniform segment lengths.
  • Figure 5: A three-segment example to illustrate the intuition behind fast steady-state computation.
  • ...and 4 more figures