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Breaking the Tuning Barrier: Zero-Hyperparameters Yield Multi-Corner Analysis Via Learned Priors

Wei W. Xing, Kaiqi Huang, Jiazhan Liu, Hong Qiu, Shan Shen

Abstract

Yield Multi-Corner Analysis validates circuits across 25+ Process-Voltage-Temperature corners, resulting in a combinatorial simulation cost of $O(K \times N)$ where $K$ denotes corners and $N$ exceeds $10^4$ samples per corner. Existing methods face a fundamental trade-off: simple models achieve automation but fail on nonlinear circuits, while advanced AI models capture complex behaviors but require hours of hyperparameter tuning per design iteration, forming the Tuning Barrier. We break this barrier by replacing engineered priors (i.e., model specifications) with learned priors from a foundation model pre-trained on millions of regression tasks. This model performs in-context learning, instantly adapting to each circuit without tuning or retraining. Its attention mechanism automatically transfers knowledge across corners by identifying shared circuit physics between operating conditions. Combined with an automated feature selector (1152D to 48D), our method matches state-of-the-art accuracy (mean MREs as low as 0.11\%) with zero tuning, reducing total validation cost by over $10\times$.

Breaking the Tuning Barrier: Zero-Hyperparameters Yield Multi-Corner Analysis Via Learned Priors

Abstract

Yield Multi-Corner Analysis validates circuits across 25+ Process-Voltage-Temperature corners, resulting in a combinatorial simulation cost of where denotes corners and exceeds samples per corner. Existing methods face a fundamental trade-off: simple models achieve automation but fail on nonlinear circuits, while advanced AI models capture complex behaviors but require hours of hyperparameter tuning per design iteration, forming the Tuning Barrier. We break this barrier by replacing engineered priors (i.e., model specifications) with learned priors from a foundation model pre-trained on millions of regression tasks. This model performs in-context learning, instantly adapting to each circuit without tuning or retraining. Its attention mechanism automatically transfers knowledge across corners by identifying shared circuit physics between operating conditions. Combined with an automated feature selector (1152D to 48D), our method matches state-of-the-art accuracy (mean MREs as low as 0.11\%) with zero tuning, reducing total validation cost by over .
Paper Structure (16 sections, 15 equations, 4 figures, 6 tables, 1 algorithm)

This paper contains 16 sections, 15 equations, 4 figures, 6 tables, 1 algorithm.

Table of Contents

  1. Introduction
  2. The Barriers of Yield Analysis
  3. Yield Multi-Corner Estimation
  4. Automation with Model Capacity Barrier
  5. Expressiveness with Tuning Barrier
  6. Breaking the Tuning Barrier via Learned Priors
  7. From Engineered to Learned Priors
  8. Cross-Corner Knowledge Transfer
  9. Uncertainty-Guided Active Learning
  10. Scalability via Sparse Feature Selection
  11. Experimental Validation
  12. TabPFN versus Traditional Surrogates
  13. Single-Corner Yield Analysis
  14. Cross-Corner Knowledge Transfer
  15. Scalable YMCA Validation
  16. ...and 1 more sections

Figures (4)

  • Figure 1: Automated YMCA framework. Sparse feature selection reduces the problem dimension within TabPFN's capacity. The main loop alternates between in-context learning and uncertainty-driven active sampling until convergence.
  • Figure 2: Read current path of 6T SRAM cell from OpenYield benchmark suite shen2025openyield.
  • Figure 3: Surrogate model comparison on 8$\times$2 SRAM. TabPFN (red) exhibits superior data efficiency in the small-sample regime while requiring zero hyperparameter tuning.
  • Figure 4: Convergence on single challenging corner (8$\times$2 SRAM, FF corner) of SOTA yield analysis methods.