Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

CellE: Automated Standard Cell Library Extension via Equality Saturation

Yi Ren, Yukun Wang, Xiang Meng, Guoyao Cheng, Baokang Peng, Lining Zhang, Yibo Lin, Runsheng Wang, Guangyu Sun

Abstract

Automated standard cell library extension is crucial for maximizing Quality of Results (QoR) in modern VLSI design. We introduce CellE, a novel framework that leverages formal methods to achieve exhaustive discovery of functionally equivalent subcircuits. CellE applies equality saturation to the post-mapping netlist, generating an e-graph to cluster all functionally equivalent implementations. This canonical representation enables an efficient pattern mining algorithm to select the most area-optimal standard cells. Experimental results show a 15.41% average area reduction (up to 23.64% over prior work). Furthermore, characterization in a commercial flow demonstrates an 8.00% average delay reduction, confirming CellE's superior QoR optimization capabilities.

CellE: Automated Standard Cell Library Extension via Equality Saturation

Abstract

Automated standard cell library extension is crucial for maximizing Quality of Results (QoR) in modern VLSI design. We introduce CellE, a novel framework that leverages formal methods to achieve exhaustive discovery of functionally equivalent subcircuits. CellE applies equality saturation to the post-mapping netlist, generating an e-graph to cluster all functionally equivalent implementations. This canonical representation enables an efficient pattern mining algorithm to select the most area-optimal standard cells. Experimental results show a 15.41% average area reduction (up to 23.64% over prior work). Furthermore, characterization in a commercial flow demonstrates an 8.00% average delay reduction, confirming CellE's superior QoR optimization capabilities.
Paper Structure (24 sections, 2 equations, 8 figures, 2 tables, 3 algorithms)

This paper contains 24 sections, 2 equations, 8 figures, 2 tables, 3 algorithms.

Table of Contents

  1. Introduction
  2. Preliminaries
  3. Problem Formulation
  4. Technology Mapping
  5. Post-mapping Netlist
  6. Subcircuits
  7. Standard Cell Library Extension (SCLX)
  8. Equality Saturation
  9. E-graph
  10. Rewrite rules
  11. CellE
  12. E-graph Construction
  13. Equality Saturation
  14. E-graph to Graph Conversion
  15. Subcircuit Mining
  16. ...and 9 more sections

Figures (8)

  • Figure 1: An example of reducing area by merging subcircuit.
  • Figure 2: Example of a frequent subcircuit.
  • Figure 3: The workflow of proposed CellE.
  • Figure 4: Simple e-graph rewriting example.
  • Figure 5: Example of graph version e-graph.
  • ...and 3 more figures

Theorems & Definitions (1)

  • definition 1: functional equivalent