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In-Memory ADC-Based Nonlinear Activation Quantization for Efficient In-Memory Computing

Shuai Dong, Junyi Yang, Biyan Zhou, Hongyang Shang, Gourav Datta, Arindam Basu

TL;DR

Boundary Suppressed K-Means Quantization (BS-KMQ), a novel NL quantization approach designed to reduce the resolution requirements of analog-to-digital converters (ADCs) in in-memory computing (IMC) systems, achieves more balanced and informative NL quantization levels.

Abstract

In deep networks, operations such as ReLU and hardware-driven clamping often cause activations to accumulate near the edges of the distribution, leading to biased clustering and suboptimal quantization in existing nonlinear (NL) quantization methods. This paper introduces Boundary Suppressed K-Means Quantization (BS-KMQ), a novel NL quantization approach designed to reduce the resolution requirements of analog-to-digital converters (ADCs) in in-memory computing (IMC) systems. By suppressing boundary outliers before clustering, BS-KMQ achieves more balanced and informative NL quantization levels. The resulting NL references are implemented using a reconfigurable in-memory NL-ADC, achieving a 7x area improvement over prior NL-ADC designs. When evaluated on ResNet-18, VGG-16, Inception-V3, and DistilBERT, BS-KMQ achieves at least 3x lower quantization error compared to linear, Lloyd-Max, cumulative distribution function (CDF), and K-means methods. It also improves post-training quantization accuracy by up to 66.8%, 25.4%, 66.6%, and 67.7%, respectively, compared to linear quantization. After low-bit fine-tuning, BS-KMQ maintains competitive accuracy with significantly fewer NL-ADC levels (3/3/4/4b). System-level simulations on ResNet-18 (6/2/3b) demonstrate up to a 4x speedup and 24x energy efficiency improvement over existing IMC accelerators.

In-Memory ADC-Based Nonlinear Activation Quantization for Efficient In-Memory Computing

TL;DR

Boundary Suppressed K-Means Quantization (BS-KMQ), a novel NL quantization approach designed to reduce the resolution requirements of analog-to-digital converters (ADCs) in in-memory computing (IMC) systems, achieves more balanced and informative NL quantization levels.

Abstract

In deep networks, operations such as ReLU and hardware-driven clamping often cause activations to accumulate near the edges of the distribution, leading to biased clustering and suboptimal quantization in existing nonlinear (NL) quantization methods. This paper introduces Boundary Suppressed K-Means Quantization (BS-KMQ), a novel NL quantization approach designed to reduce the resolution requirements of analog-to-digital converters (ADCs) in in-memory computing (IMC) systems. By suppressing boundary outliers before clustering, BS-KMQ achieves more balanced and informative NL quantization levels. The resulting NL references are implemented using a reconfigurable in-memory NL-ADC, achieving a 7x area improvement over prior NL-ADC designs. When evaluated on ResNet-18, VGG-16, Inception-V3, and DistilBERT, BS-KMQ achieves at least 3x lower quantization error compared to linear, Lloyd-Max, cumulative distribution function (CDF), and K-means methods. It also improves post-training quantization accuracy by up to 66.8%, 25.4%, 66.6%, and 67.7%, respectively, compared to linear quantization. After low-bit fine-tuning, BS-KMQ maintains competitive accuracy with significantly fewer NL-ADC levels (3/3/4/4b). System-level simulations on ResNet-18 (6/2/3b) demonstrate up to a 4x speedup and 24x energy efficiency improvement over existing IMC accelerators.
Paper Structure (9 sections, 4 equations, 8 figures, 1 table, 1 algorithm)

This paper contains 9 sections, 4 equations, 8 figures, 1 table, 1 algorithm.

Table of Contents

  1. Introduction
  2. Methods
  3. Nonlinear quantization: BS-KMQ
  4. Hardware architecture
  5. Reconfigurable In-memory Nonlinear ADC architecture
  6. Simulated Results
  7. Software performance
  8. Hardware performance
  9. Conclusion

Figures (8)

  • Figure 1: Mean Squared Error (MSE) comparison between linear yang2025high and NL quantization schemes, including Lloyd--Maxcai2019low, CDF-basedsun2020energy, K-meanswu2025kllm, and our BS-KMQ method. All quantizers (3-bit) are evaluated on the activations from the first Conv-BN-ReLU block of ResNet-18 on Cifar-10 dataset.
  • Figure 2: Overall structure of the proposed dual 9T SRAM IMC and IM NL-ADC: (a) System hardware structure. (b) Information of dual 9T SRAM bitcell. (c) Detailed circuit and timing diagram.
  • Figure 3: (a) Schematic and timing of generating references of 4-bit NL-ADC. (b) The mapping relationship from the 4-bit output of the NL-ADC to the actual 6-bit data.
  • Figure 4: Analysis of MSE for 4-Bit Quantization in a representative layer of DistilBERT. Our method is compared with conventional linear quantization and several NL schemes, including Lloyd–Max, CDF, and standard K-means.
  • Figure 5: PTQ accuracy comparison between linear quantization yang2025high and our method, along with fine-tuning (FT) accuracy, for (a) ResNet-18, (b) VGG-16, (c) Inception-V3, and (d) DistilBERT. BL denotes the floating-model baseline.
  • ...and 3 more figures