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Development of Readout Electronics for a High-Speed Event-Driven Neutron Imaging Detector Based on Timepix4

Qicai Li, Hongbin Liu, Dongcheng Cai, Haoran Guo, Xingfen Jiang, Haiyun Teng, Kai Wang, Xiuku Wang, Shengxiang Wang, Zhijia Sun, Yubin Zhao, Jianrong Zhou

Abstract

As the Chinese Spallation Neutron Source enters Phase II, the increase in proton beam power will lead to a further boost in the intensity of pulsed neutron beams. To address the demand for higher event-rate readout electronics for energy-resolved neutron imaging detectors, we have developed a high-performance readout electronics system based on the Timepix4 chip. The prototype electronics system comprises a Timepix4 chip board and a high-performance digital board, which are interconnected through a custom FMC interface. The advantage of this system is its ability to achieve the full bandwidth readout of 160 Gbps for a single Timepix4 chip. The electronics system, based solely on a single ZYNQ-MPSOC chip, is capable of fully meeting the required performance specifications within a compact form factor of 8 cm x 30 cm. Furthermore, the system features a high-capacity external SODIMM memory interface (supporting up to 32 GB), which ensures stable data readout through a single 40 Gbps QSFP+ interface. As of the present moment, notable progress has been achieved, including the successful establishment of 16 data channels between Timepix4 and FPGA that operate error-free and stably at a speed of 5.12 Gbps, which is half of the maximum theoretical speed of 10.24 Gbps. The threshold standard deviation across all pixels is less than 50 e- after equalization. And the clear structural results obtained from X-ray experiments indicate that the functionality is essentially complete, allowing further testing.

Development of Readout Electronics for a High-Speed Event-Driven Neutron Imaging Detector Based on Timepix4

Abstract

As the Chinese Spallation Neutron Source enters Phase II, the increase in proton beam power will lead to a further boost in the intensity of pulsed neutron beams. To address the demand for higher event-rate readout electronics for energy-resolved neutron imaging detectors, we have developed a high-performance readout electronics system based on the Timepix4 chip. The prototype electronics system comprises a Timepix4 chip board and a high-performance digital board, which are interconnected through a custom FMC interface. The advantage of this system is its ability to achieve the full bandwidth readout of 160 Gbps for a single Timepix4 chip. The electronics system, based solely on a single ZYNQ-MPSOC chip, is capable of fully meeting the required performance specifications within a compact form factor of 8 cm x 30 cm. Furthermore, the system features a high-capacity external SODIMM memory interface (supporting up to 32 GB), which ensures stable data readout through a single 40 Gbps QSFP+ interface. As of the present moment, notable progress has been achieved, including the successful establishment of 16 data channels between Timepix4 and FPGA that operate error-free and stably at a speed of 5.12 Gbps, which is half of the maximum theoretical speed of 10.24 Gbps. The threshold standard deviation across all pixels is less than 50 e- after equalization. And the clear structural results obtained from X-ray experiments indicate that the functionality is essentially complete, allowing further testing.
Paper Structure (10 sections, 6 figures)

This paper contains 10 sections, 6 figures.

Table of Contents

  1. Introduction
  2. Hardware design
  3. Timepix4 chip board
  4. Digital readout board
  5. Firmware design
  6. System testing
  7. GWT links PRBS-31 tests
  8. Timepix4 equalization
  9. X-ray test
  10. Conclusion

Figures (6)

  • Figure 1: Block diagram of the readout electronics.
  • Figure 2: The picture of the Timepix4 readout electronics at CSNS.
  • Figure 3: Firmware diagram of the Timepix4 readout electronics. (GWT: Gigabit Wireline Transmitter, TOP: Top area of the Timepix4 chip, BOT: Bottom area of the Timepix4 chip).
  • Figure 4: 2D eye scan results for a GWT link using Vivado 2019.2 IBERT default parameters.
  • Figure 5: (a) Equalization results of a 300 $\mu$m thick p+ in n silicon sensor. The X-axis represents the threshold values (in units of e$^{-}$, electron charge), and the Y-axis denotes the probability density, each point corresponds to a bin with a width of 100 e$^{-}$. (b) Masked pixels (outliers exceeding six times the standard deviation of pixel thresholds).
  • ...and 1 more figures