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AnalogToBi: Device-Level Analog Circuit Topology Generation via Bipartite Graph and Grammar Guided Decoding

Seungmin Kim, Mingun Kim, Yuna Lee, Yulhwa Kim

TL;DR

AnalogToBi enables explicit functional control via a circuit type token and adopts a bipartite graph-based circuit representation that decouples positional ordering from functional semantics, encouraging structural reasoning over sequence memorization and improves generalization by increasing sequence diversity without altering circuit functionality.

Abstract

Automatic generation of device-level analog circuit topologies remains a fundamental challenge in analog design automation. Recent transformer-based approaches have shown promise, yet they often suffer from limited functional controllability, memorization of training data, and the generation of electrically invalid circuits. We propose AnalogToBi, a device-level analog circuit topology generation framework that addresses these limitations. AnalogToBi enables explicit functional control via a circuit type token and adopts a bipartite graph-based circuit representation that decouples positional ordering from functional semantics, encouraging structural reasoning over sequence memorization. In addition, grammar-guided decoding enforces electrical validity during generation, while apply device renaming-based data augmentation improves generalization by increasing sequence diversity without altering circuit functionality. Experimental results show that AnalogToBi achieves 97.8% validity and 92.1% novelty, resulting in 89.9% valid and novel circuits under conditional generation, without human expert involvement. We further present that generated circuits can be automatically translated into SPICE netlists, and SPICE simulations confirm that AnalogToBi discovers high-quality analog topologies that outperform prior methods. For code and supplementary materials, see https://github.com/Seungmin0825/AnalogToBi

AnalogToBi: Device-Level Analog Circuit Topology Generation via Bipartite Graph and Grammar Guided Decoding

TL;DR

AnalogToBi enables explicit functional control via a circuit type token and adopts a bipartite graph-based circuit representation that decouples positional ordering from functional semantics, encouraging structural reasoning over sequence memorization and improves generalization by increasing sequence diversity without altering circuit functionality.

Abstract

Automatic generation of device-level analog circuit topologies remains a fundamental challenge in analog design automation. Recent transformer-based approaches have shown promise, yet they often suffer from limited functional controllability, memorization of training data, and the generation of electrically invalid circuits. We propose AnalogToBi, a device-level analog circuit topology generation framework that addresses these limitations. AnalogToBi enables explicit functional control via a circuit type token and adopts a bipartite graph-based circuit representation that decouples positional ordering from functional semantics, encouraging structural reasoning over sequence memorization. In addition, grammar-guided decoding enforces electrical validity during generation, while apply device renaming-based data augmentation improves generalization by increasing sequence diversity without altering circuit functionality. Experimental results show that AnalogToBi achieves 97.8% validity and 92.1% novelty, resulting in 89.9% valid and novel circuits under conditional generation, without human expert involvement. We further present that generated circuits can be automatically translated into SPICE netlists, and SPICE simulations confirm that AnalogToBi discovers high-quality analog topologies that outperform prior methods. For code and supplementary materials, see https://github.com/Seungmin0825/AnalogToBi
Paper Structure (35 sections, 3 equations, 9 figures, 6 tables, 2 algorithms)

This paper contains 35 sections, 3 equations, 9 figures, 6 tables, 2 algorithms.

Table of Contents

  1. Introduction
  2. Related Work
  3. Topology Search
  4. Topology Refinement
  5. Behavioral-Level Topology Generation
  6. Device-Level Topology Generation
  7. Proposed Method
  8. Circuit Type Token for Functionality Control
  9. Bipartite Graph Circuit Representation
  10. Grammar-Guided Decoding
  11. Data Augmentation with Device Renaming
  12. Experiments
  13. Experimental Setup
  14. Main Results
  15. Ablation Study
  16. ...and 20 more sections

Figures (9)

  • Figure 1: Overview of the proposed AnalogToBi framework. Given a user-specified circuit type, a Transformer decoder trained with renaming augmented dataset generates a device-level circuit sequence under grammar-guided decoding. The generated sequence is mapped to a bipartite device–net graph and netlist.
  • Figure 2: Example of analog circuit categorization based on functionality. OpAmps amplify input signals, while comparators (Comp) compare two input signals and generate outputs based on the comparison result. Each category is associated with a corresponding circuit type token.
  • Figure 3: Comparison between conventional device–pin level representation gao2025analoggenie and the proposed bipartite graph representation. The device–pin representation (left) treats each device pin as a separate token, while the bipartite representation (right) models devices and nets as distinct node types with pin semantics encoded as typed edges.
  • Figure 4: State machine for Grammar-guided decoding. The grammar restricts valid token transitions during circuit generation.
  • Figure 5: Overview of sequence generation and device renaming augmentation for analog circuits. (a) Original device-level circuit topology. (b) Corresponding bipartite graph representation. (c) Token sequence serialized by graph traversal. (d) Functionally equivalent sequence obtained from device renaming augmentation.
  • ...and 4 more figures