ConnChecker: Automated Root-Cause Analysis for Formal Connectivity Check via Graph

TL;DR

ConnChecker introduces a new graph-based perspective for automating root-cause analysis by integrating formal tool outputs such as structural/functional dependency graphs and counterexamples report, demonstrating its scalability and effectiveness across diverse connectivity scenarios.

Abstract

Formal connectivity checking offers scalable verification of signal paths in complex SoC designs, but debugging counterexamples remains a manual and time-consuming process. ConnChecker introduces a new graph-based perspective for automating root-cause analysis by integrating formal tool outputs such as structural/functional dependency graphs and counterexamples report. It begins with automatic failure categorization, routing each counterexample to one of three targeted analysis flows. These flows localize failure points and suggest corrective actions or hints for manual inspection. Evaluated on two industrial SoCs, ConnChecker achieved up to 80\% reduction in debugging time, especially for complex cases, demonstrating its scalability and effectiveness across diverse connectivity scenarios.

Figures (12)

• Figure 1: ConnChecker to accelerate connectivity debug process
• Figure 2: A simple RTL design modeled as a directed dependency graph $G = (V, E)$. To check connectivity from source ($v_s$) to destination ($v_d$), we consider a path $P \subseteq G$, where $P = \{v_s, \text{out\_1}, \text{out\_2}, D, Q, v_d\}$ and the corresponding edges are $E_P = \{(v_s, \text{out\_1}), (\text{out\_1}, \text{out\_2}), (\text{out\_2}, D), (D, Q), (Q, v_d)\}$.
• Figure 3: Failure categorization flow
• Figure 4: Analysis Flow 1 - Segment-level connectivity for identifying the root-cause on the path
• Figure 5: Analysis Flow 2 for identifying breakpoint(s) during connectivity check