QGPU: Parallel logic in quantum LDPC codes

TL;DR

Clustered-cyclic codes are introduced, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions.

Abstract

Quantum error correction is critical to the design and manufacture of scalable quantum computing systems. Recently, there has been growing interest in quantum low-density parity-check codes as a resource-efficient alternative to surface codes. Their adoption is hindered by the difficulty of compiling fault-tolerant logical operations. A key challenge is that logical qubits do not necessarily map to disjoint sets of physical qubits, which limits parallelism. We introduce clustered-cyclic codes, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions. These codes admit a directly addressable logical basis, enabling highly parallel logical measurement layers. To leverage this structure, we propose parallel product surgery for quantum product codes. Using an auxiliary copy of the data patch and an engineered product-connection structure, the protocol performs many logical Pauli-product measurements in a single surgery round with small, fixed overhead. For clustered-cyclic codes, this yields surface-code-style maximal parallelism: up to k/2 disjoint Pauli-product measurements per round under explicit algebraic conditions. We prove that parallel product surgery preserves the code distance for hypergraph product codes and numerically verify distance preservation for the listed clustered-cyclic instances with k = 8. Finally, for the [[24,8,3]] clustered-cyclic code, treating half of the logical qubits as auxiliaries enables arbitrary parallel CNOTs on disjoint pairs; combined with symmetry-derived operations, these gates generate the full Clifford group fault-tolerantly.

Figures (10)

• Figure 1: Illustration of the clustered logical operator basis of CC codes and maximally parallel surgery.(a) Each CC code $\mathcal{Q}$ is constructed as the tensor product of two classical seed codes $H_a$ and $H_b$. As an LP code defined over $R=\mathbb{F}_2[x]/(x^p+1)$, passing to the binary representation lifts each ring element to a cluster of $p$ physical qubits. Qubits and quantum checks can therefore be visualised as a square array of clusters inheriting the structure of the classical seed codes. Physical qubits partition into two sectors corresponding to the direct-sum structure in Equation \ref{['eq: LP chain complexes over R']}. Every CC code admits a clustered logical operator basis in which each logical operator is supported on an entire cluster. If two basis elements anti-commute, their supports coincide on that whole cluster of physical qubits. Each logical qubit can thus be addressed directly via its associated physical cluster. (b) Maximally parallel surgery on CC codes performing four joint $Z$ logical measurements across eight logical qubits. A second copy of the data patch is prepared as an auxiliary patch. Connections between $Z$-type checks of the auxiliary patch and data qubits in the original patch are determined by the product connection code $\mathcal{P}$ with parity check matrices $(H_X',H_Z')$. Maximal parallelism is obtained when the parity check matrix of $\mathcal{P}$ has full rank. The four measured logical pairs are distinguished by colours and connection lines. (c) Two logical $\mathit{CNOT}$ gates executed in parallel with fixed space overhead for the $[\![24,8,3]\!]$ CC code. Logical $\mathit{CNOT}_{2\to 6}$ and $\mathit{CNOT}_{4\to 8}$ are implemented using both $X$- and $Z$-basis logical PPMs as described in Figure \ref{['Figure: CNOT_surgery_framework']}, treating logical qubits $1,3,5,7$ as auxiliaries. For example, a joint $ZZ$ measurement between $2,5$ followed by a joint $XX$ measurement between $5,6$, together with state initialisation and logical $Z$ measurement on $5$ implements the logical $\mathit{CNOT}_{2\to 6}$. Together with automorphism-induced logical $\mathit{SWAP}$ gates available in the $[\![24,8,3]\!]$ CC code, every stage of the protocol can be parallelised, including state initialisation, both types of joint logical measurements, and measurements of auxiliary qubits. Logical qubits are depicted as numbered circles, with red circles initialised in the $\ket{\bar{+}}$ state vector. Blue and red double lines represent $Z$-type and $X$-type merges, respectively. The entire procedure requires only $48$ additional physical qubits, consisting of $24$ auxiliary data qubits and $24$ auxiliary check qubits. A concrete construction for implementing arbitrary logical $\mathit{CNOT}$ gates, and for parallelising arbitrary pairs of logical $\mathit{CNOT}$ gates on four logical qubits of the $[\![24,8,3]\!]$ CC code, appears in Appendix \ref{['Appendix: CNOTs_24_8_3']}. Compilation of the full Clifford group on four logical qubits is illustrated in Section \ref{['Section: clifford']}.
• Figure 2: Comparison of space overhead distributions between gauging-based logical measurements Gauging_logical (wide blue violins) and parallel surgery-boosted gauging (narrow orange violins) for the $[\![136,8,14]\!]$ CC code in the $Z$ basis. Each violin represents the distribution over all allowed combinations of logical measurements that incur a given space overhead. The bullet (cross) indicates the mean value for each distribution and the horizontal lines are for the medians. Single logical: measurement of different combinations of single logical operators within one surgery round. Joint logical of pairs of two: measurement of different combinations of non-overlapping joint logical operators pairs within one surgery round. Mixed: combinations consisting of both single logical measurements and joint measurements on pairs of logical qubits as long as no measurement overlaps on any logical qubit. $^\%$Only configurations compatible with parallel product surgery are included in the comparison.
• Figure 3: Circuit-level memory performance of CC codes and comparison.Logical failure rates per syndrome extraction cycle (LFRs) as a function of physical error rate $\epsilon$ for the (a) $8$-logical and (b) $18$-logical CC code families under circuit-level depolarizing noise. (c) LFR per logical qubit $\epsilon_{1,1}$ as a function of $\epsilon$. We compare the performance of the $[\![136,8,14]\!]$ and $[\![198,18,10]\!]$ CC codes with the $[\![144,12,12]\!]$ Gross BB code BB_IBM. The dashed grey line denotes the break-even line $\epsilon_{1,1}=\epsilon$.
• Figure 4: Circuits for implementing the PPM-induced $\mathit{CNOT}$Qian_fast_and_para.
• Figure 5: The procedure for performing logical $\mathit{CNOT}_{6\to 2}$ in parallel with $\mathit{CNOT}_{8\to 4}$ or $\mathit{CNOT}_{6\to 4}$ in parallel with $\mathit{CNOT}_{8\to 2}$ via parallel surgery for the $[\![24,8,3]\!]$ CC code. The uncoloured circles are logical qubits in unknown states, while red coloured circile are the logical qubits initialised in $\ket{\overline{+}}$. The blue double line connects two logical qubits being merged in $Z$ basis, while the red double line connects the logical qubits being merged in $X$ basis.

Theorems & Definitions (54)

• Definition 3.1: Lifted product codes
• Lemma 3.2: Künneth formula Algebraic_topoBalanced_product
• Remark 3.3: Hypergraph product codes
• Definition 4.1: Clustered-cyclic code
• Definition 4.2: Clustered logical operator basis
• Theorem 4.3: Clustered logical operator basis of CC codes
• proof
• Remark 4.4
• Example 4.5
• Corollary 4.6: Code parameters of CC codes