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Efficient Time-Aware Partitioning of Quantum Circuits for Distributed Quantum Computing

Raymond P. H. Wu, Chathu Ranaweera, Sutharshan Rajasegarar, Ria Rushin Joseph, Jinho Choi, Seng W. Loke

TL;DR

This work proposes a heuristic based on beam search to solve the circuit partitioning problem and demonstrates that the proposed algorithm consistently achieves significantly lower communication costs than static baselines across varying circuit sizes, depths, and network topologies, providing an efficient compilation tool for near-term distributed quantum hardware.

Abstract

To overcome the physical limitations of scaling monolithic quantum computers, distributed quantum computing (DQC) interconnects multiple smaller-scale quantum processing units (QPUs) to form a quantum network. However, this approach introduces a critical challenge, namely the high cost of quantum communication between remote QPUs incurred by quantum state teleportation and quantum gate teleportation. To minimize this communication overhead, DQC compilers must strategically partition quantum circuits by mapping logical qubits to distributed physical QPUs. Static graph partitioning methods are fundamentally ill-equipped for this task as they ignore execution dynamics and underlying network topology, while metaheuristics require substantial computational runtime. In this work, we propose a heuristic based on beam search to solve the circuit partitioning problem. Our time-aware algorithm incrementally constructs a low-cost sequence of qubit assignments across successive time steps to minimize overall communication overhead. The time and space complexities of the proposed algorithm scale quadratically with the number of qubits and linearly with circuit depth, offering a significant computational speedup over common metaheuristics. We demonstrate that our proposed algorithm consistently achieves significantly lower communication costs than static baselines across varying circuit sizes, depths, and network topologies, providing an efficient compilation tool for near-term distributed quantum hardware.

Efficient Time-Aware Partitioning of Quantum Circuits for Distributed Quantum Computing

TL;DR

This work proposes a heuristic based on beam search to solve the circuit partitioning problem and demonstrates that the proposed algorithm consistently achieves significantly lower communication costs than static baselines across varying circuit sizes, depths, and network topologies, providing an efficient compilation tool for near-term distributed quantum hardware.

Abstract

To overcome the physical limitations of scaling monolithic quantum computers, distributed quantum computing (DQC) interconnects multiple smaller-scale quantum processing units (QPUs) to form a quantum network. However, this approach introduces a critical challenge, namely the high cost of quantum communication between remote QPUs incurred by quantum state teleportation and quantum gate teleportation. To minimize this communication overhead, DQC compilers must strategically partition quantum circuits by mapping logical qubits to distributed physical QPUs. Static graph partitioning methods are fundamentally ill-equipped for this task as they ignore execution dynamics and underlying network topology, while metaheuristics require substantial computational runtime. In this work, we propose a heuristic based on beam search to solve the circuit partitioning problem. Our time-aware algorithm incrementally constructs a low-cost sequence of qubit assignments across successive time steps to minimize overall communication overhead. The time and space complexities of the proposed algorithm scale quadratically with the number of qubits and linearly with circuit depth, offering a significant computational speedup over common metaheuristics. We demonstrate that our proposed algorithm consistently achieves significantly lower communication costs than static baselines across varying circuit sizes, depths, and network topologies, providing an efficient compilation tool for near-term distributed quantum hardware.
Paper Structure (10 sections, 5 equations, 3 figures, 1 algorithm)

This paper contains 10 sections, 5 equations, 3 figures, 1 algorithm.

Table of Contents

  1. Introduction
  2. Circuit Partitioning Problem
  3. Graph Representation of Quantum Circuits
  4. Problem Formulation
  5. Beam Search Algorithm for Quantum Circuit Partitioning
  6. Results
  7. Experimental Setup
  8. Baseline Comparison and Scalability
  9. Adaptability to Network Topologies
  10. Conclusion

Figures (3)

  • Figure 1: An illustrative example of quantum circuit partitioning for a system with $k=2$ QPUs of equal capacity $c_j=4$.
  • Figure 2: Comparison of communication costs between METIS and beam search for quantum circuits of various sizes. Error bars represent one standard error.
  • Figure 3: Comparison of communication costs between METIS and beam search across different network topologies for random quantum circuits with number of qubits $N=32$ and circuit depth $T=128$. Error bars represent one standard error.