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A Digital Twin of the FPGA Digital Signal Processing Chain for MKIDs Readout: Root-Cause Analysis and Mitigation of Spurs

Mounir Abdkrimi, Olivier Rossetto, Olivier Bourrion, Christophe Vescovi, Christophe Hoarau

Abstract

The KID_READOUT board, developed for the CONCERTO millimeter-wave astronomy instrument, implements FPGA-based digital frequency multiplexing to read out large arrays of Microwave Kinetic Inductance Detectors (MKIDs). The complexity of the implemented multirate DSP chain, which combines tones synthesis, interpolation, digital frequency translation, polyphase filter-bank (PFB) channelization, and digital down-conversion (DDC), makes analytical performance optimization difficult. To address this, we developed a cycle-and bitaccurate, Python-based digital twin of the FPGA readout firmware DSP chain. Using this model, we identified the origin of previously measured and unexplained spurs in the readout channels, tracing them to periodicity mismatches between the excitation and analysis paths and to insufficient suppression of negative-frequency components by the DDC filters. Based on these insights, we implemented a mitigation strategy that aligns the periodicities and improves the DDC filter characteristics, effectively eliminating the spurs with a minor increase in FPGA resource usage.

A Digital Twin of the FPGA Digital Signal Processing Chain for MKIDs Readout: Root-Cause Analysis and Mitigation of Spurs

Abstract

The KID_READOUT board, developed for the CONCERTO millimeter-wave astronomy instrument, implements FPGA-based digital frequency multiplexing to read out large arrays of Microwave Kinetic Inductance Detectors (MKIDs). The complexity of the implemented multirate DSP chain, which combines tones synthesis, interpolation, digital frequency translation, polyphase filter-bank (PFB) channelization, and digital down-conversion (DDC), makes analytical performance optimization difficult. To address this, we developed a cycle-and bitaccurate, Python-based digital twin of the FPGA readout firmware DSP chain. Using this model, we identified the origin of previously measured and unexplained spurs in the readout channels, tracing them to periodicity mismatches between the excitation and analysis paths and to insufficient suppression of negative-frequency components by the DDC filters. Based on these insights, we implemented a mitigation strategy that aligns the periodicities and improves the DDC filter characteristics, effectively eliminating the spurs with a minor increase in FPGA resource usage.
Paper Structure (34 sections, 28 equations, 13 figures, 1 table)

This paper contains 34 sections, 28 equations, 13 figures, 1 table.

Table of Contents

  1. Introduction
  2. Context and Motivation
  3. Overview of MKID Readout Architecture
  4. Contribution of this work
  5. Digital Twin: Simulation, Analysis, and Mitigation of Spurs
  6. Simulation
  7. Origin of Spurs Analysis
  8. Tone Generator
  9. Time Domain:
  10. Frequency Domain:
  11. Down-shifter
  12. Time Domain:
  13. Frequency Domain:
  14. Upsampling: Periodicity extension
  15. Time Domain:
  16. ...and 19 more sections

Figures (13)

  • Figure 1: Frequency response of the MKID feedline used in the CONCERTO instrument.
  • Figure 2: Overview of the instrumentation chain.
  • Figure 3: Simulation results: (a) Time-domain representation of one selected I/Q signal; (b) corresponding amplitude and phase PSD.
  • Figure 4: PSD measurement of amplitude and phase noise from CONCERTO bourrion2022concerto. A representative tone from each of the 10 frequency bands is shown.
  • Figure 5: Digital loop-back : Block-level description of the simulated digital excitation and analysis chains operated in closed loop for a single-tone configuration.
  • ...and 8 more figures