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SHIELD8-UAV: Sequential 8-bit Hardware Implementation of a Precision-Aware 1D-F-CNN for Low-Energy UAV Acoustic Detection and Temporal Tracking

Susmita Ghanta, Karan Nathwani, Rohit Chaurasiya

TL;DR

SHIELD8-UAV is presented, a sequential 8-bit hardware implementation of a precision-aware 1D feature-driven CNN (1D-F-CNN) accelerator for continuous acoustic monitoring that enables practical low-energy edge inference without relying on massive parallelism.

Abstract

Real-time unmanned aerial vehicle (UAV) acoustic detection at the edge demands low-latency inference under strict power and hardware limits. This paper presents SHIELD8-UAV, a sequential 8-bit hardware implementation of a precision-aware 1D feature-driven CNN (1D-F-CNN) accelerator for continuous acoustic monitoring. The design performs layer-wise execution on a shared multi-precision datapath, eliminating the need for replicated processing elements. A layer-sensitivity quantisation framework supports FP32, BF16, INT8, and FXP8 modes, while structured channel pruning reduces the flattened feature dimension from 35,072 to 8,704 (75%), thereby lowering serialised dense-layer cycles. The model achieves 89.91% detection accuracy in FP32 with less than 2.5% degradation in 8-bit modes. The accelerator uses 2,268 LUTs and 0.94 W power with 116 ms end-to-end latency, achieving 37.8% and 49.6% latency reduction compared with QuantMAC and LPRE, respectively, on a Pynq-Z2 FPGA, and 5-9% lower logic usage than parallel designs. ASIC synthesis in UMC 40 nm technology shows a maximum operating frequency of 1.56 GHz, 3.29 mm2 core area, and 1.65 W total power. These results demonstrate that sequential execution combined with precision-aware quantisation and serialisation-aware pruning enables practical low-energy edge inference without relying on massive parallelism.

SHIELD8-UAV: Sequential 8-bit Hardware Implementation of a Precision-Aware 1D-F-CNN for Low-Energy UAV Acoustic Detection and Temporal Tracking

TL;DR

SHIELD8-UAV is presented, a sequential 8-bit hardware implementation of a precision-aware 1D feature-driven CNN (1D-F-CNN) accelerator for continuous acoustic monitoring that enables practical low-energy edge inference without relying on massive parallelism.

Abstract

Real-time unmanned aerial vehicle (UAV) acoustic detection at the edge demands low-latency inference under strict power and hardware limits. This paper presents SHIELD8-UAV, a sequential 8-bit hardware implementation of a precision-aware 1D feature-driven CNN (1D-F-CNN) accelerator for continuous acoustic monitoring. The design performs layer-wise execution on a shared multi-precision datapath, eliminating the need for replicated processing elements. A layer-sensitivity quantisation framework supports FP32, BF16, INT8, and FXP8 modes, while structured channel pruning reduces the flattened feature dimension from 35,072 to 8,704 (75%), thereby lowering serialised dense-layer cycles. The model achieves 89.91% detection accuracy in FP32 with less than 2.5% degradation in 8-bit modes. The accelerator uses 2,268 LUTs and 0.94 W power with 116 ms end-to-end latency, achieving 37.8% and 49.6% latency reduction compared with QuantMAC and LPRE, respectively, on a Pynq-Z2 FPGA, and 5-9% lower logic usage than parallel designs. ASIC synthesis in UMC 40 nm technology shows a maximum operating frequency of 1.56 GHz, 3.29 mm2 core area, and 1.65 W total power. These results demonstrate that sequential execution combined with precision-aware quantisation and serialisation-aware pruning enables practical low-energy edge inference without relying on massive parallelism.
Paper Structure (18 sections, 9 equations, 6 figures, 5 tables)

This paper contains 18 sections, 9 equations, 6 figures, 5 tables.

Table of Contents

  1. Introduction
  2. Background and Motivation
  3. Acoustic UAV Detection and Feature-Driven Learning
  4. Sequential, Precision-Aware Edge Hardware
  5. Proposed SHIELD8-UAV Approach
  6. Feature-Driven 1D-F-CNN for UAV Detection
  7. Precision-Aware Quantisation With Layer Sensitivity
  8. Structured Pruning for Serialisation-Aware Optimisation
  9. Sequential Multi-Precision Accelerator Architecture
  10. Methodology and Experimental Setup
  11. Dataset Preparation and Augmentation
  12. Training and Evaluation Metrics
  13. Algorithm-Hardware Co-Design Evaluation
  14. Results and Discussion
  15. Detection Performance and Precision Impact
  16. ...and 3 more sections

Figures (6)

  • Figure 1: Overview of the algorithm-hardware co-design stack for UAV acoustic detection and temporal tracking on edge platforms.
  • Figure 2: The proposed 1D-F-CNN architecture used for acoustic UAV detection. The network operates on compact feature sequences and is designed for efficient mapping to sequential hardware execution.
  • Figure 3: Proposed precision-aware sequential accelerator architecture with shared compute and multi-precision support.
  • Figure 4: Detection accuracy versus signal-to-noise ratio (SNR).
  • Figure 5: Error analysis under noise conditions: (a) false alarm rate and (b) missed detection rate. False alarms remain at low SNR levels, while missed detections increase when UAV acoustic signatures are impacted by background noise.
  • ...and 1 more figures