Table of Contents
Fetching ...

Current pulse generator: A circuit for programming RRAM in current mode

Bojian Zhang, Paolo Gibertini, Meysam Akbari, Erika Covi

TL;DR

A current generator circuit is demonstrated to perform current programming on \ac{RRAM}, using current mirror topology to convert an external pulse voltage into a pulse current fed to \ac{RRAM}.

Abstract

Switching uniformity, as a major challenge, hinders the practical implementation of \ac{RRAM} in memory application. Operating \ac{RRAM} in current mode, is proposed as an efficient method to improve programming schemes accuracy within the finite readout window. In this article, we demonstrate a current generator circuit to perform current programming on \ac{RRAM}. Current mirror topology is used in our circuit to convert an external pulse voltage into a pulse current fed to \ac{RRAM} directly with an amplitude equivalent with the DC reference current. The targeting ranges of \ac{RRAM}'s programming current are up to 400\,\textmu A and, in that case, our proposed circuit achieved minimum current mismatch of 1\%.

Current pulse generator: A circuit for programming RRAM in current mode

TL;DR

A current generator circuit is demonstrated to perform current programming on \ac{RRAM}, using current mirror topology to convert an external pulse voltage into a pulse current fed to \ac{RRAM}.

Abstract

Switching uniformity, as a major challenge, hinders the practical implementation of \ac{RRAM} in memory application. Operating \ac{RRAM} in current mode, is proposed as an efficient method to improve programming schemes accuracy within the finite readout window. In this article, we demonstrate a current generator circuit to perform current programming on \ac{RRAM}. Current mirror topology is used in our circuit to convert an external pulse voltage into a pulse current fed to \ac{RRAM} directly with an amplitude equivalent with the DC reference current. The targeting ranges of \ac{RRAM}'s programming current are up to 400\,\textmu A and, in that case, our proposed circuit achieved minimum current mismatch of 1\%.
Paper Structure (7 sections, 2 equations, 13 figures)

This paper contains 7 sections, 2 equations, 13 figures.

Figures (13)

  • Figure 1: (a) Photograph of the fabricated wafer containing multiple dies. (b) Schematic of the 2M1R1B circuit.
  • Figure 2: DC characterization of the mirror in the SET branch. The mirrored current $I_{\mathrm{mirr,set}}$ in branch M5/M7/M0 increases linearly with $I_{\mathrm{ref,set}}$ varying from 50 µ A to 450 µ A (blue curve). The corresponding mirror factor across the whole $I_{\mathrm{ref,set}}$ is kept approximately at 1.0 (red curve) with a maximum aberration of 3% at 50 µ A.
  • Figure 3: Operation range assessment of SET branch with DC measurement. $I_{\mathrm{mirr,set}}$ is measured while sweeping $V_{\mathrm{dd,set}}$ from 0 V to 5 V with $V_{\mathrm{chop,set}}$ at 0 V.
  • Figure 4: DC characterization of the mirror in the RESET branch. The mirrored current $I_{\mathrm{mirr,res}}$ in branch M3/M8/M10 increases linearly with $I_{\mathrm{ref,res}}$ varying from 50 µ A to 450 µ A (blue curve). The corresponding mirror factor across the whole $I_{\mathrm{ref,res}}$ is kept approximately at 1.0 (red curve) with a maximum aberration 6% at 50 µ A.
  • Figure 5: Operation range assessment of RESET branch with DC measurement. $I_{\mathrm{mirr,res}}$ is measured while sweeping $V_{\mathrm{dd,res}}$ from 0 V to 5 V with $V_{\mathrm{chop,res}}$ at 5 V.
  • ...and 8 more figures