Characterization of Josephson Junction Aging and Annealing Under Different Environments

Abstract

Understanding the aging behavior of Josephson junctions and the effect of annealing on junction resistances is important in building large-scale superconducting quantum processors. Here we study the effects of aging of Josephson junctions under different storage conditions from immediately after fabrication up to 2 to 3 months. We find that the aging curve follows a logarithmic curve, with the aging amplitude mainly determined by fabrication conditions and the aging speed determined by storage conditions. Junctions stored at ambient laboratory conditions aged faster compared to junctions stored in a nitrogen atmosphere or vacuum, with the aging speed appreciably changes when the storage condition changed. We also compared the effect of thermal annealing under nitrogen environment with annealing under ambient conditions up to 250$^\circ$ C. We find that under nitrogen environment, the resistances decreased at all temperatures tested, while under ambient environment the resistances increased at 200$^\circ$ C and decreased at 250$^\circ$ C instead. We were unable to decrease the resistance below the initial-time resistance, suggesting a lower limit on the range of resistance tuning.

Figures (4)

• Figure 1: Aging curves for test junctions stored in atmosphere and glove box. (a) Resistance $R$ of test junctions over a period of 56 days. The small dots are the resistances of individual junctions, and the larger dots corresponds to the average resistance. The thick dashed lines are fit of the average resistances to logarithmic function of Eq. \ref{['eq:logfit']}. (b) Resistance CV over the measurement period. (c-f) Histogram of fit parameters (c) $\tau$ (d) $\log(\tau)$ (e) $a$ (f) $b$ for each individual junction. The circle symbols correspond to the fit parameters obtained from the average resistance, while the square symbols correspond to the average value of the histogram.
• Figure 2: (a) Average fractional aging of Chips 3, 4 and 5 in semilogarithmic axes. Chip 3 was stored in glove box while Chip 4 was stored in atmosphere during the shaded period, and vice versa during the non-shaded period. The black vertical line corresponds to the time Chip 5 was moved from vacuum to glove box. The red line and blue region correspond to the estimated aging bounds based on aging of Chips 1, 2 and 6. (b) Resistance CV over the measurement period.
• Figure 3: Resistance change of the test junctions as a function of time after the voltage annealing process. The dotted lines corresponds to the expected aging of the non-annealed junctions based on the fit parameters in Table \ref{['tab:vanneal']}.
• Figure 4: Fractional resistance of the test junctions after each thermal annealing process. The horizontal dashed line corresponds to the $t\approx0$ resistance value.