Low-Noise Quantum Dots in Ultra-Shallow Ge/SiGe Heterostructures for Prototyping Hybrid Semiconducting-Superconducting Devices

Abstract

Planar germanium is currently the only semiconducting platform where high-coherence spin qubits and proximity-induced superconductivity have each been demonstrated. Recent research into spin qubits in Ge/SiGe heterostructures has focused on increasing the thickness of the SiGe capping layer, reporting improvements in the electrostatic noise levels. Meanwhile, heterostructures with thinner capping layers remain rather unexplored, despite the potential advantages for proximity-induced superconductivity. Here, we study a Ge/SiGe heterostructure with a thin SiGe cap $d \approx 4\ \mathrm{nm}$ and investigate its viability to host low-noise quantum dots. To keep the thermal budget compatible with superconducting layers, low-temperature oxide deposition processes were developed and implemented for the gate dielectrics. The charge-noise level of fabricated devices is estimated to be $1.8 \pm 1.0\ μ\mathrm{eV}/\sqrt{\mathrm{Hz}}$, comparable to devices fabricated on shallow heterostructures $\left(d \sim 20\ \mathrm{nm}\right)$ with high-temperature deposited oxides. Low charge-noise levels, together with the straightforward integration of superconductors, make this heterostructure an attractive platform for prototyping hybrid semiconducting-superconducting devices.

Figures (12)

• Figure 1: QDs on an ultra-shallow Ge/SiGe heterostructure. (a) HAADF-STEM of the Ge/SiGe heterostructure with the Al$_2$O$_3$ oxide deposited on top. The estimated cap thickness is $d \approx 4n m$. (b) SEM of a device lithographically identical to Device A. (c) Coulomb diamonds of the left QD. $V_{\mathrm{bias}}$ is the external voltage and $G$ is the conductance calculated as a numerical derivative of the current $I$. The presented data is not corrected for the series resistance $R_{\mathrm{in}}$. Pink cut indicates the gate voltage span over which the time traces in \ref{['fig:figure2']} were taken. (d) DQD stability diagram measured with the charge sensor. (e-f) Fast scans over the virtual detuning $\varepsilon$ and energy $U$ axes of the DQD. The charge occupation of the dots is measured by using a reflectometry circuit analogous to the one used in Refjirovec_singlet-triplet_2021. An out-of-plane magnetic field $B_{\perp} \approx 5m T$ was applied.
• Figure 2: Noise analysis across a Coulomb peak. (a) Time traces of current across the Coulomb peak. The remarkable stability is demonstrated within the $\approx1$ hour data recording window. The external voltage bias $V_{\textrm{bias}}$ is set to $270µ V$. The voltage drop $V_{\mathrm{SD}}$ over the QD changes by $\approx 30\%$ due to the TIA input resistance $R_{\mathrm{in}} \approx 1MΩ$. (b) PSD estimated via the Welch method for each of the plunger gate voltages $V_{\mathrm{g}}$. The horizontal lines, independent of the plunger gate voltage $V_{\mathrm{g}}$, are attributed either to mechanical vibrations or to the $50Hz$ harmonics. (c) Traces demonstrating different spectral behavior (black dots) with the corresponding fit (blue, green, red curves). The corresponding voltage $V_{\mathrm{g}}$ at which the traces are taken are indicated at the top. For all subpanels we plot the PSD in the Coulomb blockade (black) and on top of the Coulomb peak (gray). (d) Averaged current $\left<I(V_{\mathrm{g}})\right>$ (left axis) and electrochemical potential noise density $S_{\mu}$ (right axis) evaluated at $1Hz$. The colorcoding of the points is the same as in panel c. The errorbars correspond to the fitting errors.
• Figure 3: Statistics of the noise metrics. The value on top of each of the violin plots corresponds to the average and standard deviation values for all data for that specific device and is marked by the bar. (a) Charge noise value evaluated at $1Hz$. (b) Extracted exponent $\beta$ reported for those datapoints described by the model with the $1/f$ term. (c) Extracted frequency $f_0$ of the single TLF. No Lorentz contributions were observed for Device B.
• Figure S1: Device B overview. (a) SEM image of Device B. (b) Stability diagram of Device B.
• Figure S2: Stability diagrams for (a) Right QD of Device A. (b) Sensor QD of Device A. The Sensor QD was tuned into the cotunneling regime for charge sensing. The noise on the Sensor QD was analyzed in that gate configuration.