Compute System Organization for High Frequency High Order Wavefront Sensing and Control

Abstract

Maintaining long-term wavefront stability is critical for the Habitable Worlds Observatory (HWO), which targets contrasts approaching $10^{-10}$ and therefore requires continuous dark-zone maintenance using high-order wavefront sensing and control (HOWFSC). Prior work has advanced HOWFSC algorithms and profiled candidate implementations on radiation-hardened processors, highlighting a substantial gap between the computational demands of LUVOIR-scale HOWFSC and the capabilities of current onboard spacecraft hardware. In this paper, we argue that this gap can be closed by offloading the HOWFSC pipeline to a dedicated co-flying compute satellite at Sun-Earth L2. This approach enables the use of modern, radiation-tolerant high-performance processors without increasing risk to the primary observatory. We show that such an architecture can increase the end-to-end control cadence from the sub-hertz regime typical of radiation-hardened onboard processing or ground-in-the-loop operation to tens and even hundreds of hertz. We evaluate commercial hardware platforms in terms of performance and feasibility, and we propose custom architectures that enable higher control frequencies with significant power consumption reductions. Finally, we outline system-level considerations for co-flying compute, including reliability, satellite integration, and inter-satellite communication constraints.

Figures (11)

• Figure 1: Impact of wavefront sensing cadence on contrast by Pueyo et al PUEYO_PRES, annotated with achievable cadence and contrast of GITL and on-board BAE5545 for the LUVOIR A system with $\Delta \text{wf}=$1.70pms.
• Figure 2: a) Upper-bound of control frequency relative to link latency and bandwidth, assuming infinite compute, symmetric spatial links, and dithering-based estimation (pairwise probing will have higher demand on link bandwidth, scaling with the number of probes). Frequencies are capped to 200Hz for better visibility. b) Upper bound of control frequency relative to offload distance for various link bandwidths, assuming 1ms latency for signal processing on top of propagation latency.
• Figure 3: Roofline plot of three key dark hole maintenance kernels of a LUVOIR system on the Nvidia H100 GPU, assuming precomputed Jacobian and inverse matrices stored in single precision.
• Figure 4: a) Modern high-performance hardware by double-precision floating-point performance and memory bandwidth, plotted with the operational intensity of HOWFSC Kernels. b) EFC compute requirement at different iterations per second (considering only EFC).
• Figure 5: GEMV Parallelization Strategy with constant matrix: 1) Broadcast input vector states to all processors, 2) perform inner product individually, and 3) gather output vector.