Influence of electrical properties on thermal boundary conductance at metal/semiconductor interface

TL;DR

This work demonstrates that electrical properties—specifically doping level, Schottky barrier height, and space-charge width—modulate thermal boundary conductance (TBC) at metal/semiconductor interfaces. Using frequency-domain photothermal radiometry and systematic electrical characterization (I(V,T) and C(V)), the authors correlate interfacial electronic structure with TBC under no-bias and biased conditions for Ti/Si and Pt/Si junctions. They show that TBC can be enhanced by up to ~40% under bias, primarily through collapse of the space-charge region and increased interfacial charge interactions, with hot-electron transfer playing a secondary role. The findings suggest that electrostatic control of the space-charge region offers a viable route to tune interfacial heat transfer in metal/semiconductor systems, with implications for nanoscale thermal management and device reliability.

Abstract

Recent experimental investigations have demonstrated that doping a semiconductor is a route to increase the thermal boundary conductance at metal/semiconductor interfaces. In this work, the influence of the electrical properties on heat transfer across metal/doped semiconductor junctions is investigated. Specifically, thermal boundary conductance at the interfaces between p- and n-doped silicon and titanium is measured by employing frequency-domain photothermal radiometry under varying external conditions. The influence of the doping level of the semiconductor, the barrier height, and the space charge area is analyzed. In particular, a 40% increase in the interface thermal conductance with the application of a current at n-doped silicon/titanium interfaces is reported. The enhancement of the thermal boundary conductance is explained by the shrinking of the surface charga area induced by the electric current. This study opens the way to modulating interfacial heat transfer at metal/semiconductor interfaces through fine tuning of electrical effects.

Figures (18)

• Figure 1: Schematic representation of the three possible channels of transmission for the heat flux through a metal/semiconductor interface.
• Figure 2: Schematic representation of samples showing the convention of polarization adopted throughout this work.
• Figure 3: 3D simulations of the potential within the sample using the finite element method.
• Figure 4: Band diagrams extracted from simulations for $n$- (left) and $p$- (right) doping level substrates, with a 2 V reverse bias applied to the M/SC junction. Solid green and orange curves refer to the conduction and valence bands respectively, dashed lines represent the Fermi level and $E_0$ is the work of extraction. On each figure, the metal is located at the left side.
• Figure 5: Current-bias characteristics of the titanium/$p$-doped silicon sample for the different methods tested for the rear functionalization of silicon substrates.