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Review of prototypes developed in a 65 nm CMOS imaging technology in view of vertexing applications at a future lepton collider

Finn King, Matthew Lewis Franks, Yajun He, Gianpiero Vignola, Simon Spannagel, Malte Backhaus, Auguste Besson, Dominik Dannheim, Andrei Dorokhov, Ingrid-Maria Gregor, Fadoua Guezzi-Messaoud, Lennart Huth, Armin Ilg, Zdenko Janoska, Monika Kuncova, Anna Macchiolo, Frédéric Morel, Sara Ruiz Daza, Roberto Russo, Judith Schlaadt, Serhiy Senyukov, Peter Švihra, Anastasiia Velyka, Håkan Wennlöf

Abstract

The OCTOPUS project addresses the development and characterization of monolithic active pixel sensors in the TPSCo 65 nm ISC technology in view of vertexing applications at a future lepton collider. Meeting the corresponding requirements -- outlined in the ECFA detector road map -- will necessitate the simulation, design, and testing of prototypes and a demonstrator chip in this very process. This work reviews the literature on existing prototypes, summarizing their design characteristics, properties, and performance in charged-particle detection, and provides an overview of previous simulation efforts. The presented results suggest the feasibility of the endeavor while showcasing challenges, the need for further investigations, and providing a foundation for imminent design choices.

Review of prototypes developed in a 65 nm CMOS imaging technology in view of vertexing applications at a future lepton collider

Abstract

The OCTOPUS project addresses the development and characterization of monolithic active pixel sensors in the TPSCo 65 nm ISC technology in view of vertexing applications at a future lepton collider. Meeting the corresponding requirements -- outlined in the ECFA detector road map -- will necessitate the simulation, design, and testing of prototypes and a demonstrator chip in this very process. This work reviews the literature on existing prototypes, summarizing their design characteristics, properties, and performance in charged-particle detection, and provides an overview of previous simulation efforts. The presented results suggest the feasibility of the endeavor while showcasing challenges, the need for further investigations, and providing a foundation for imminent design choices.
Paper Structure (35 sections, 10 figures, 2 tables)

This paper contains 35 sections, 10 figures, 2 tables.

Table of Contents

  1. Introduction
  2. Sensor layouts
  3. Standard layout
  4. N-blanket layout
  5. N-gap layout
  6. Doping concentrations
  7. Geometrical parameters
  8. Selected prototypes
  9. Experimental results
  10. General properties
  11. Pixel capacitance
  12. Noise, threshold dispersion, and fake-hit rate
  13. Power dissipation
  14. Charged-particle detection
  15. Charge collection and charge sharing
  16. ...and 20 more sections

Figures (10)

  • Figure 1: Cross-section of different pixel sensor layouts: (a) the standard layout, (b) the n-blanket layout and (c) the n-gap layout. Modified from apts.
  • Figure 2: ENC for APTS with operational-amplifier readout, a pitch of 10µm, and n-gap layout as a function of the reverse bias voltage. The numbers are from apts-timing and derived as the RMS of the signal baseline. Statistical uncertainties are below $0.05\,\text{e}^{-}$ and not visible in the figure.
  • Figure 3: Distributions of the seed pixel signal for different types of APTS sensors. All sensors have a pitch of 15µm, and are reverse biased to -1.2V. Modified from apts.
  • Figure 4: Cluster size at a threshold of $100\,\text{e}^{-}$, comparing different pixel pitches, reverse bias voltages, and sensor layouts. All pitches are multiples of 5µm, the points are shifted in x-direction for better visibility. The results represent various prototypes in the TPSCo 65nm ISC technology and are taken from aptsapts-timingdptsh2mapts_desy_simdis_adri. A detailed listing of the numbers and the corresponding references is given in \ref{['app:tab']}.
  • Figure 5: Hit-detection efficiency as a function of the threshold, comparing two CE65v2 chips in standard layout with different pitches and at different reverse bias voltages (absolute values). Modified from ce65v2_pixel.
  • ...and 5 more figures