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Structural control of two-level defect density revealed by high-throughput correlative measurements of Josephson junctions

Oliver F. Wolff, Harshvardhan Mantry, Rahim Raja, Wei-Hsiang Peng, Kaushik Singirikonda, Seungkyun Lee, Shishir Sudhaman, Rafael Goncalves, Pinshane Y. Huang, Angela Kou, Wolfgang Pfaff

TL;DR

This work tackles the defect-driven bottleneck posed by strongly-coupled two-level systems (TLS) in Al/AlOx/Al Josephson junctions by developing a high-throughput, correlative workflow that couples cryogenic TLS-density measurements with atomic-resolution TEM imaging across a large JJ dataset. By using resonator-array devices and automated TLS detection, the authors extract $ ho_{TLS}$ for different fabrication recipes and link these densities to microstructural features such as Al electrode thickness and grain size, revealed through ST EM analysis. A significant finding is that thicker Al electrodes correlate with larger grain sizes and yield a two-thirds reduction in TLS density, establishing electrode thickness and grain morphology as actionable knobs for TLS suppression. The reported data-driven approach enables systematic grain-engineering strategies to improve coherence and scalability of superconducting qubits, marking a shift from barrier-centric views of TLS to microstructure-driven control. Overall, the paper demonstrates that TLS occurrence in Al/AlOx JJs can be substantially modulated through fabrication, with tangible improvements in device reliability for multi-qubit quantum processors.

Abstract

Materials defects in Josephson junctions (JJs), often referred to as two-level systems (TLS), couple to superconducting qubits and are a critical bottleneck for scalable quantum processors. Despite their importance, understanding the microscopic sources of TLS and how to mitigate them has remained a major challenge. Here, we demonstrate a high-throughput, correlated approach to trace the microstructural origins of strongly-coupled TLS in Josephson circuits. We assembled a massive dataset of TLS across 6,000 Al/AlOx/Al JJs and more than 600 atomic resolution transmission electron microscopy images. We statistically link fabrication, microstructure, and TLS occurrence, revealing a strong correlation between Al electrode thickness, Al grain size, and TLS density. Correspondingly, we find a two-thirds reduction in TLS prompted by a change in electrode fabrication parameters. These results demonstrate a robust, data-driven methodology to understand and control defects in quantum circuits and pave the way for significantly reducing TLS density.

Structural control of two-level defect density revealed by high-throughput correlative measurements of Josephson junctions

TL;DR

This work tackles the defect-driven bottleneck posed by strongly-coupled two-level systems (TLS) in Al/AlOx/Al Josephson junctions by developing a high-throughput, correlative workflow that couples cryogenic TLS-density measurements with atomic-resolution TEM imaging across a large JJ dataset. By using resonator-array devices and automated TLS detection, the authors extract for different fabrication recipes and link these densities to microstructural features such as Al electrode thickness and grain size, revealed through ST EM analysis. A significant finding is that thicker Al electrodes correlate with larger grain sizes and yield a two-thirds reduction in TLS density, establishing electrode thickness and grain morphology as actionable knobs for TLS suppression. The reported data-driven approach enables systematic grain-engineering strategies to improve coherence and scalability of superconducting qubits, marking a shift from barrier-centric views of TLS to microstructure-driven control. Overall, the paper demonstrates that TLS occurrence in Al/AlOx JJs can be substantially modulated through fabrication, with tangible improvements in device reliability for multi-qubit quantum processors.

Abstract

Materials defects in Josephson junctions (JJs), often referred to as two-level systems (TLS), couple to superconducting qubits and are a critical bottleneck for scalable quantum processors. Despite their importance, understanding the microscopic sources of TLS and how to mitigate them has remained a major challenge. Here, we demonstrate a high-throughput, correlated approach to trace the microstructural origins of strongly-coupled TLS in Josephson circuits. We assembled a massive dataset of TLS across 6,000 Al/AlOx/Al JJs and more than 600 atomic resolution transmission electron microscopy images. We statistically link fabrication, microstructure, and TLS occurrence, revealing a strong correlation between Al electrode thickness, Al grain size, and TLS density. Correspondingly, we find a two-thirds reduction in TLS prompted by a change in electrode fabrication parameters. These results demonstrate a robust, data-driven methodology to understand and control defects in quantum circuits and pave the way for significantly reducing TLS density.
Paper Structure (12 sections, 11 equations, 7 figures, 2 tables)

This paper contains 12 sections, 11 equations, 7 figures, 2 tables.

Figures (7)

  • Figure 1: Resonator fabrication, measurement, and structural analysis loop. (a) For each fabrication treatment, we perform microwave measurements and microstructural characterization to extract TLS densities and grain-structure features at the junction interfaces. Combining these measurements with statistical inference allows us to identify correlations between fabrication treatment parameters, junction microstructure, and TLS density. (b) To ensure that the resonators used for TLS-density measurements and those used for microstructure analysis experience identical fabrication histories, both sets have the same design and are patterned on the same chip. Left scale bar: 60. Right scale bar: 2. Devices designated for TEM analysis are diced from the chip, while the remaining resonators are packaged for cryogenic rf measurements.
  • Figure 2: TLS detection workflow. (a) Resonator responses are measured and fit to the hanger model to extract resonator frequency, $f_0$, and residuals. The center frequency and applied d.c. flux bias is updated automatically over a pre-defined current sequence. (b) Example data produced by this autonomous 'curve-following' measurement procedure. The yellow line cut exhibits a clear avoided crossing (AvC). (c) Resonator responses marked by dashed lines in (b), with absence (purple) and presence (yellow) of TLS coupling. Black lines are fits to the standard 'hanger'-model. (d) Simulated residual distributions used to calibrate the detector. Each resonator is simulated with (yellow) and without (purple) TLS coupling. Gaussian fits to the two distributions are used to determine the optimal detection threshold (in green), corresponding to the threshold in (e). (e) Residuals from a curve-following measurement, with tuning-axes re-normalized to units of resonator linewidth. The calibrated TLS-detection threshold is indicated, along with the identified TLS events. (f) Top: Poisson likelihood function $\mathcal{L}(\lambda)$ for the TLS density parameter $\lambda$, conditioned on the number of detections $N_\text{m}$. Bottom: Posterior probability distribution for the number of TLS in the measured sample. The inference incorporates the number of detections from (e), the false-positive and false-negative rates determined in (d), and the maximum-likelihood estimate of $\lambda$ inferred from $\mathcal{L}(N_\text{m})$.
  • Figure 3: Effect of fabrication parameters and treatments on TLS densities. Key: A, A' – standard fabrication; B – annealed at 250℃ for 20 minutes; C – slower aluminum deposition rate (0.6); D – thicker Al electrodes (bottom: 100, top: 150). (a) Top: Extracted mean number of TLS, $\langle N_\text{TLS}\rangle$. Each bar is segmented by individual resonator contributions, grouped by fabrication treatment. Bottom: TLS densities for different fabrication treatments. Dots represent individual resonator measurements. Horizontal lines indicate the mean TLS density, and shaded rectangles denote the standard error of the mean. (b) Step plots of the TLS densities from (a), with overlaid scaled gamma fits (dotted curves) used to model the distributions. Thicker electrodes (red; $\rho_\text{TLS}=0.07\pm0.04$ TLS ) show a two-thirds reduction in TLS density compared to unannealed, annealed, and slow-deposition samples (blue; $\rho_\text{TLS}=0.20\pm0.10$ TLS ).
  • Figure 4: Cross-sectional STEM images of Josephson junctions. (a) BF-STEM image of one Josephson junction. The intensity variations correspond to different grains in the Al electrodes. (b) ADF-STEM image of a flat, uniform junction with [111] facet facing the junction for both top and bottom electrodes. (c) ADF-STEM image of enlarged junction width due to grain boundary grooving. (d) ADF-STEM image of Al/AlOx/Al showing junction morphology metrics measured. $E_t$ is the thickness of the bottom electrode. $J_t$ is the thickness of the junction as a function of position. $E_{gw}$ is the lateral Al grain width.
  • Figure 5: Correlation between TLS densities and various structural metrics extracted from STEM images. (a, b) Cross-sectional BF-STEM images of junctions from samples C and D, respectively, illustrating the grain structure. (c) Plot of TLS density versus lateral Al grain size. Sample D, which features thicker trilayers, exhibits both significantly reduced TLS densities and larger grains compared to samples A, A', B, and C. Each data point represents a sample average. Vertical error bars correspond to the standard error in TLS density (as in \ref{['fig: tls densities']}), and horizontal error bars indicate the 68.27$\%$ confidence interval for the mean lateral grain size. (d) Pearson correlation coefficients and associated P-values of measured STEM features against mean TLS density. Only the electrode thickness mean and mean grain size are statistically significant. (e) Ranking of feature impact on Ridge regression model performance from permutation importance analysis. The mean electrode thickness is shown to be the most important factor to predict TLS from STEM images.
  • ...and 2 more figures