The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes

TL;DR

The paper introduces the Pinnacle Architecture, a modular quantum computing framework based on quantum LDPC codes designed to drastically reduce the qubit overheads of fault-tolerant computation. By combining Processing Units, Magic Engines, and optional Memory with Clifford frame cleaning and Pauli-based computation, Pinnacle achieves universal fault-tolerant operation with significantly lower spacetime overhead than surface-code-based approaches. The authors demonstrate end-to-end resource estimates for RSA-2048 factoring and Fermi-Hubbard ground-state energy calculations, showing sub-100k physical qubits sufficiency under realistic error rates and code cycle times, and revealing strong spacetime-scaling advantages via parallelism. This work suggests a practical pathway to utility-scale quantum computing on hardware regimes far smaller than previously thought feasible, with broad applicability beyond cryptography to quantum simulation. All mathematical quantities are expressed with $...$ notation as appropriate.

Abstract

The realisation of utility-scale quantum computing inextricably depends on the design of practical, low-overhead fault-tolerant architectures. We introduce the \textit{Pinnacle Architecture}, which uses quantum low-density parity check (QLDPC) codes to allow for universal, fault-tolerant quantum computation with a spacetime overhead significantly smaller than that of any competing architecture. With this architecture, we show that 2048-bit RSA integers can be factored with less than one hundred thousand physical qubits, given a physical error rate of $10^{-3}$, code cycle time of $1$ \textmu s and a reaction time of $10$ \textmu s. We thereby demonstrate the feasibility of utility-scale quantum computing with an order of magnitude fewer physical qubits than has previously been believed necessary.

Figures (7)

• Figure 1: Examples of the Pinnacle Architecture. These two examples represent specific examples of different space-time trade-offs and code block choices, optimised for RSA-2048 factoring in different hardware regimes. Example (a) allows factoring in one month with a physical error rate of $p=10^{-3}$ and a code cycle time of $t_c=1$ µ s. Example (b) allows factoring in three months with a physical error rate of $p=10^{-4}$ and a code cycle time of $t_c=1$ ms. Shorter runtimes can be achieved by adding more processing units, increasing paralellisation at the cost of additional physical qubits.
• Figure 2: Physical qubits required for determining the ground state energy of the Fermi-Hubbard model on an $L\times L$ lattice to 0.5% relative precision. Surface code values correspond to the minimum quoted number of physical qubits with $u/\tau=4$ in Ref. kivlichan_improved_2020.
• Figure 3: Optimal expected runtime for factoring an RSA-2048 integer on the Pinnacle Architecture as a function of the number of physical qubits and the code cycle time at physical error rates of (a)$p=10^{-3}$ and (b)$p=10^{-4}$. White areas indicate insufficient physical qubits to implement the algorithm. The reaction time in all cases is assumed to be equal to ten times the code cycle time.
• Figure 4: Structure and operation of a magic engine. Magic state distillation is applied on one logical sector of a QLDPC code block using noisy $\ket{T}$ states injected from ancillary systems. In parallel, an arbitrary Pauli measurement on the processing unit joint with $\bar{Z}_1$ on the other logical sector injects an encoded $\ket{\bar{T}}$ state that was distilled in the previous logical cycle.
• Figure 5: Process of joining and separating processing units with Clifford frame cleaning to allow for flexible parallelism.

Theorems & Definitions (4)

• Lemma 1
• proof
• Lemma 2
• proof