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Area-Efficient In-Memory Computing for Mixture-of-Experts via Multiplexing and Caching

Hanyuan Gao, Xiaoxuan Yang

TL;DR

This work tackles the area inefficiency and load imbalance of Mixture-of-Experts transformers on process-in-memory hardware. It introduces crossbar-level multiplexing to share peripherals across expert groups, static workload-aware expert grouping, and a gate-output (GO) cache to accelerate autoregressive generation, complemented by a dynamic scheduling algorithm to maximize data reuse. The approach yields up to 2.2× MoE-area improvement and, for generation, 4.2× latency and 10.1× energy benefits, achieving 15.6 GOPS/W/mm^2. These gains are demonstrated on a MoE-Llama setup with a PIM simulator and are supported by open-source code, highlighting practical improvements for energy-efficient, scalable MoE deployment on PIM hardware.

Abstract

Mixture-of-Experts (MoE) layers activate a subset of model weights, dubbed experts, to improve model performance. MoE is particularly promising for deployment on process-in-memory (PIM) architectures, because PIM can naturally fit experts separately and provide great benefits for energy efficiency. However, PIM chips often suffer from large area overhead, especially in the peripheral circuits. In this paper, we propose an area-efficient in-memory computing architecture for MoE transformers. First, to reduce area, we propose a crossbar-level multiplexing strategy that exploits MoE sparsity: experts are deployed on crossbars and multiple crossbars share the same peripheral circuits. Second, we propose expert grouping and group-wise scheduling methods to alleviate the load imbalance and contention overhead caused by sharing. In addition, to address the problem that the expert choice router requires access to all hidden states during generation, we propose a gate-output (GO)cache to store necessary results and bypass expensive additional computation. Experiments show that our approaches improve the area efficiency of the MoE part by up to 2.2x compared to a SOTA architecture. During generation, the cache improves performance and energy efficiency by 4.2x and 10.1x, respectively, compared to the baseline when generating 8 tokens. The total performance density achieves 15.6 GOPS/W/mm2. The code is open source at https://github.com/superstarghy/MoEwithPIM.

Area-Efficient In-Memory Computing for Mixture-of-Experts via Multiplexing and Caching

TL;DR

This work tackles the area inefficiency and load imbalance of Mixture-of-Experts transformers on process-in-memory hardware. It introduces crossbar-level multiplexing to share peripherals across expert groups, static workload-aware expert grouping, and a gate-output (GO) cache to accelerate autoregressive generation, complemented by a dynamic scheduling algorithm to maximize data reuse. The approach yields up to 2.2× MoE-area improvement and, for generation, 4.2× latency and 10.1× energy benefits, achieving 15.6 GOPS/W/mm^2. These gains are demonstrated on a MoE-Llama setup with a PIM simulator and are supported by open-source code, highlighting practical improvements for energy-efficient, scalable MoE deployment on PIM hardware.

Abstract

Mixture-of-Experts (MoE) layers activate a subset of model weights, dubbed experts, to improve model performance. MoE is particularly promising for deployment on process-in-memory (PIM) architectures, because PIM can naturally fit experts separately and provide great benefits for energy efficiency. However, PIM chips often suffer from large area overhead, especially in the peripheral circuits. In this paper, we propose an area-efficient in-memory computing architecture for MoE transformers. First, to reduce area, we propose a crossbar-level multiplexing strategy that exploits MoE sparsity: experts are deployed on crossbars and multiple crossbars share the same peripheral circuits. Second, we propose expert grouping and group-wise scheduling methods to alleviate the load imbalance and contention overhead caused by sharing. In addition, to address the problem that the expert choice router requires access to all hidden states during generation, we propose a gate-output (GO)cache to store necessary results and bypass expensive additional computation. Experiments show that our approaches improve the area efficiency of the MoE part by up to 2.2x compared to a SOTA architecture. During generation, the cache improves performance and energy efficiency by 4.2x and 10.1x, respectively, compared to the baseline when generating 8 tokens. The total performance density achieves 15.6 GOPS/W/mm2. The code is open source at https://github.com/superstarghy/MoEwithPIM.
Paper Structure (15 sections, 5 equations, 5 figures, 1 table, 1 algorithm)

This paper contains 15 sections, 5 equations, 5 figures, 1 table, 1 algorithm.

Figures (5)

  • Figure 1: Overview of the MoE accelerator with PIM.
  • Figure 2: Grouping and scheduling at the prefill stage.
  • Figure 3: The KV and GO cache for expert choice routing MoE.
  • Figure 4: Latency results of the generate stage.
  • Figure 5: Results of different scheduling methods.