Differentiable Logical Programming for Quantum Circuit Discovery and Optimization
Antonin Sulc
TL;DR
This work introduces Differentiable Logical Programming (DLP) to quantum circuit design by recasting discrete circuit structure search as differentiable optimization over continuous gate switches on a circuit scaffold. Gate inclusion is controlled through learnable logits mapped to switches with either linear or geodesic interpolation, and the design is guided by differentiable axioms for fidelity, energy, and simplicity, enabling end-to-end optimization of both structure and parameters. The authors provide a theoretical analysis of the linear relaxation as a surrogate, including norm deviation bounds and gradient stability, and enhance tractability with curriculum learning and Hierarchical Synthesis to scale to larger systems. Empirically, DLP demonstrates de novo QFT circuit discovery, Trotter-step optimization, noise-resilient learning under shot noise, hardware-aware topology adaptation, and real-time adaptation to hardware failures on IBM qubits, including substantial fidelity gains and much shallower circuits when hardware constraints are honored. Overall, DLP offers a flexible, neuro-symbolic framework that unifies circuit synthesis, compilation, and hardware-aware optimization under a gradient-based paradigm with broad potential for NISQ and early fault-tolerant quantum computing.
Abstract
Designing high-fidelity quantum circuits remains challenging, and current paradigms often depend on heuristic, fixed-ansatz structures or rule-based compilers that can be suboptimal or lack generality. We introduce a neuro-symbolic framework that reframes quantum circuit design as a differentiable logic programming problem. Our model represents a scaffold of potential quantum gates and parameterized operations as a set of learnable, continuous ``truth values'' or ``switches,'' $s \in [0, 1]^N$. These switches are optimized via standard gradient descent to satisfy a user-defined set of differentiable, logical axioms (e.g., correctness, simplicity, robustness). We provide a theoretical formulation bridging continuous logic (via T-norms) and unitary evolution (via geodesic interpolation), while addressing the barren plateau problem through biased initialization. We illustrate the approach on tasks including discovery of a 4-qubit Quantum Fourier Transform (QFT) from a scaffold of 21 candidate gates. We also report a hardware-aware adaptation experiment on the 133-qubit IBM Torino processor, where the method improved fidelity by 59.3 percentage points in a localized routing task while adapting to hardware failures.
