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Quantum Sequential Circuits

D. -S. Wang

TL;DR

This work addresses the need for memory and temporal control in quantum computing by introducing quantum sequential circuits (QSCs) built from quantum transistors that store gates as Choi states and operate them via bulk measurements. It proposes a hardware framework that uses ebits and symmetry-protected topological edge modes to realize looped gate activation, enabling a quantum von Neumann-like architecture. The paper develops a complete set of circuit elements, algorithmic modules, and higher-level programming constructs, including quantum control, QFT, QPE, amplitude amplification, gradient descent, and quantum simulation, all within a modular, hybrid hardware model. By integrating quantum programming via superchannels and quantum error-correcting strategies in a matrix-product-state/convolutional-code setting, it outlines a path toward scalable, memory-rich quantum processors that complement conventional qubit-based approaches.

Abstract

This work introduces and characterizes quantum sequential circuits (QSCs) as a hardware-oriented paradigm for quantum computing, built upon a novel foundational element termed the quantum transistor. Unlike conventional qubit-based architectures, QSCs employ symmetry-protected topological junctions where quantum gates are encoded as Choi states via channel-state duality and activated through bulk measurements, utilizing ebits to realize the functional analog of feedback loops in classical sequential circuits. This framework establishes a universal model for quantum computation that inherently incorporates memory and temporal sequencing, complementing existing combinational quantum circuit model. Our work advances the conceptual bridge towards a quantum von Neumann architecture, underscoring the potential of hybrid and modular design principles for the development of large-scale, integrated quantum information processors.

Quantum Sequential Circuits

TL;DR

This work addresses the need for memory and temporal control in quantum computing by introducing quantum sequential circuits (QSCs) built from quantum transistors that store gates as Choi states and operate them via bulk measurements. It proposes a hardware framework that uses ebits and symmetry-protected topological edge modes to realize looped gate activation, enabling a quantum von Neumann-like architecture. The paper develops a complete set of circuit elements, algorithmic modules, and higher-level programming constructs, including quantum control, QFT, QPE, amplitude amplification, gradient descent, and quantum simulation, all within a modular, hybrid hardware model. By integrating quantum programming via superchannels and quantum error-correcting strategies in a matrix-product-state/convolutional-code setting, it outlines a path toward scalable, memory-rich quantum processors that complement conventional qubit-based approaches.

Abstract

This work introduces and characterizes quantum sequential circuits (QSCs) as a hardware-oriented paradigm for quantum computing, built upon a novel foundational element termed the quantum transistor. Unlike conventional qubit-based architectures, QSCs employ symmetry-protected topological junctions where quantum gates are encoded as Choi states via channel-state duality and activated through bulk measurements, utilizing ebits to realize the functional analog of feedback loops in classical sequential circuits. This framework establishes a universal model for quantum computation that inherently incorporates memory and temporal sequencing, complementing existing combinational quantum circuit model. Our work advances the conceptual bridge towards a quantum von Neumann architecture, underscoring the potential of hybrid and modular design principles for the development of large-scale, integrated quantum information processors.
Paper Structure (24 sections, 9 equations, 10 figures, 1 table)

This paper contains 24 sections, 9 equations, 10 figures, 1 table.

Figures (10)

  • Figure 1: A representation of the quantum transistor we defined in the form of Choi state. The curve on the left represents ebits.
  • Figure 2: Symbols for elements in combinational quantum circuits (top) and an example circuit (bottom), which also shows a gate conditional on the measurement outcome. Note one can also put dots at the end of the circuit to label output qubits.
  • Figure 3: Some simple examples of sequential quantum circuits with loops. This type of circuits can be used to realize iterative operations.
  • Figure 4: Symbols for elements in sequential quantum circuits (top) and the same circuit as in figure \ref{['fig:circ']} (bottom). A measurement signal on a gate is also shown.
  • Figure 5: Quantum finite state machine which is a type of hybrid circuit.
  • ...and 5 more figures