Quantum Circuit Generation via test-time learning with large language models

TL;DR

This work tackles the challenge of using large language models (LLMs) to iteratively optimize quantum circuit design under black-box evaluation by casting circuit synthesis as a closed-loop, test-time learning problem. It introduces a memory-enhanced prompting loop where an LLM edits a fixed-length gate list, guided by an external evaluator measuring the Meyer-Wallach global entanglement $Q(\psi)$ and reinforced by score-difference feedback and restart-from-best sampling. Across 20-qubit experiments with a fixed gate set, the approach yields improvements over random circuits, including instances reaching $Q(\psi) \approx 1$, while on 25-qubits the feedback-enabled strategy mitigates a plateau around $Q(\psi) \approx 0.7$ and drives toward high-entanglement states, often stabilizer or graph-like in structure. The results illustrate both the potential and the caveats of memory-evaluator-guided LLM optimization for circuit synthesis, emphasizing that prior theoretical insights are crucial to design effective tools and prompting strategies.

Abstract

Large language models (LLMs) can generate structured artifacts, but using them as dependable optimizers for scientific design requires a mechanism for iterative improvement under black-box evaluation. Here, we cast quantum circuit synthesis as a closed-loop, test-time optimization problem: an LLM proposes edits to a fixed-length gate list, and an external simulator evaluates the resulting state with the Meyer-Wallach (MW) global entanglement measure. We introduce a lightweight test-time learning recipe that can reuse prior high-performing candidates as an explicit memory trace, augments prompts with a score-difference feedback, and applies restart-from-the-best sampling to escape potential plateaus. Across fixed 20-qubit settings, the loop without feedback and restart-from-the-best improves random initial circuits over a range of gate budgets. To lift up this performance and success rate, we use the full learning strategy. For 25-qubit, it mitigates a pronounced performance plateau when naive querying is used. Beyond raw scores, we analyze the structure of synthesized states and find that high MW solutions can correspond to stabilizer or graph-state-like constructions, but full connectivity is not guaranteed due to the metric property and prompt design. These results illustrate both the promise and the pitfalls of memory evaluator-guided LLM optimization for circuit synthesis, highlighting the critical role of prior human-made theoretical theorem to optimally design a custom tool in support of research.

Figures (1)

• Figure 1: Box (A). The training loop for the model with a prompt that does not consider the evaluation of the circuit. Box (B). The training loop with the reward. Inside the feedback, the reward in the form of a sentence you improved by this amount or a critique you made worse of this amount is provided together with the new circuit. Lower-row red boxes. An example of entangling circuit generation for 6 steps with in-train inference. On the left, the initial input circuit generated by randomly sampling from the set $\{ \mathrm{ CNOT, H,RY} \}$ and angle gates in $\{3,10,25 \}$. In this example, the model GPT5.1 without feedback is used, with the output circuit incorporated into the prompt at each step. As explicitly stated by the prompt, the model replaces the gates with new ones in a creative way to find an original solution, i.e., avoid shortcuts like re-discovering a long list of CNOT gates, or getting stuck in a similar pattern. The final pair in the reddish right box is a product of Bell entangled pairs with non-trivial amplitude due to the $\mathrm{RY}$ rotation and some single qubit.