ENFOR-SA: End-to-end Cross-layer Transient Fault Injector for Efficient and Accurate DNN Reliability Assessment on Systolic Arrays

TL;DR

ENFOR-SA addresses the high cost of RTL-accurate fault injection for modern DNNs on systolic-array accelerators by introducing an end-to-end cross-layer framework that couples PyTorch-level inference with RTL fault injection focused on the SA Mesh. It employs a non-intrusive Verilator-based injection strategy and a compile-time Mesh isolation step to preserve RTL fidelity while avoiding the overhead of full-SoC RTL simulation. The approach achieves RTL-accurate fault analysis with approximately a 569-fold speedup over full RTL and only about a 6% slowdown compared with software-based injections, outperforming a state-of-the-art cross-layer tool by around 2x in injection performance. Open-sourced and scalable, ENFOR-SA enables accurate reliability assessment across diverse DNNs and SA configurations, facilitating practical resilience design for modern DNN accelerators.

Abstract

Recent advances in deep learning have produced highly accurate but increasingly large and complex DNNs, making traditional fault-injection techniques impractical. Accurate fault analysis requires RTL-accurate hardware models. However, this significantly slows evaluation compared with software-only approaches, particularly when combined with expensive HDL instrumentation. In this work, we show that such high-overhead methods are unnecessary for systolic array (SA) architectures and propose ENFOR-SA, an end-to-end framework for DNN transient fault analysis on SAs. Our two-step approach employs cross-layer simulation and uses RTL SA components only during fault injection, with the rest executed at the software level. Experiments on CNNs and Vision Transformers demonstrate that ENFOR-SA achieves RTL-accurate fault injection with only 6% average slowdown compared to software-based injection, while delivering at least two orders of magnitude speedup (average $569\times$) over full-SoC RTL simulation and a $2.03\times$ improvement over a state-of-the-art cross-layer RTL injection tool. ENFOR-SA code is publicly available at https://github.com/rafaabt/ENFOR-SA.

Figures (5)

• Figure 1: Example of Verilog and equivalent verilated codes for a chain of register assignments: ENFOR-SA injects in reg3 by targeting the reg2 variable; HDFIT requires instrumenting each assignment, resulting in additional operations per cycle, even when a single signal is injected (e.g., an 8$\times$8 mesh has 632 assignments, all instrumented).
• Figure 2: The Gemmini PE's architecture (Simplified. Output stationary). ENFOR-SA can inject in all signals inside the PEs.
• Figure 3: In step 1, we generate the original SoC system; in step 2, we extract the Mesh module and couple it to interface adapters that emulate major hardware blocks required for systolic simulation (e.g., shift registers, transposers). A library is generated and used at runtime.
• Figure 4: Runtime cross-layer call stack. A lightweight model instrumentation offloads the (per-tile) matmul kernel (e.g., convolutions or an attention blocks) down to an RTL SA module to perform matrix multiplication. The SA result is flushed from the internal PE accumulators and sent back to the PyTorch layer through fast interfaces.
• Figure 5: ReNet50: a) AVF for control signals. b) Fault exposure probability for data registers. The config is an 8$\times$8 SA (OS).