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KEK Accelerator Test Facility Low-Level RF and Timing Systems

Konstantin Popov, Alexander Aryshev, Hiroshi Kaji, Toshiyuki Okugi

TL;DR

The paper assesses the KEK ATF LLRF clock distribution, focusing on achieving sub-picosecond synchronization across the facility by measuring the phase-noise PSD (PN-PSD) of distributed clock signals. It employs SSA-based measurements to characterize PN-PSD and rms time jitter along Linac, Damping Ring, and Final Focus branches, using the Linac clock as the grandmaster distributed via Phase Stabilized Optical Fiber. Key findings show that the Linac-based paths can maintain integrated jitter on the order of ~100 fs under nominal conditions, but the damping-ring ramp-generation loop substantially degrades timing, elevating jitter to the few-ps level. The work identifies the ramp-generation path as the primary bottleneck and recommends targeted upgrades to the ramp architecture, control loop, and electronics placement to realize sub-100 fs stability across all ATF sections, with direct implications for nanobeam technologies and ILC-scale timing requirements.

Abstract

The KEK Accelerator Test Facility (ATF) is a dedicated testbed for nanobeam technologies in support of the International Linear Collider (ILC). Stable pulsed operation requires synchronization of the facility timing system with the Low-Level RF (LLRF) system. The timing system distributes trigger and gate signals to key subsystems, including the DAQ, klystrons, laser systems, pulsed kicker magnets, and interlocks. The LLRF system provides phase-coherent RF references and facility-wide clock distribution for synchronization. Achieving ~100 fs-level synchronization depends critically on the phase-noise power spectral density (PN-PSD) of the distributed clock signals and on preserving this performance throughout the distribution network. We present facility-wide measurements of the KEK ATF LLRF clock PN-PSD and discuss the resulting synchronization floor imposed by the stability of the ATF Linac and Damping Ring signal generators.

KEK Accelerator Test Facility Low-Level RF and Timing Systems

TL;DR

The paper assesses the KEK ATF LLRF clock distribution, focusing on achieving sub-picosecond synchronization across the facility by measuring the phase-noise PSD (PN-PSD) of distributed clock signals. It employs SSA-based measurements to characterize PN-PSD and rms time jitter along Linac, Damping Ring, and Final Focus branches, using the Linac clock as the grandmaster distributed via Phase Stabilized Optical Fiber. Key findings show that the Linac-based paths can maintain integrated jitter on the order of ~100 fs under nominal conditions, but the damping-ring ramp-generation loop substantially degrades timing, elevating jitter to the few-ps level. The work identifies the ramp-generation path as the primary bottleneck and recommends targeted upgrades to the ramp architecture, control loop, and electronics placement to realize sub-100 fs stability across all ATF sections, with direct implications for nanobeam technologies and ILC-scale timing requirements.

Abstract

The KEK Accelerator Test Facility (ATF) is a dedicated testbed for nanobeam technologies in support of the International Linear Collider (ILC). Stable pulsed operation requires synchronization of the facility timing system with the Low-Level RF (LLRF) system. The timing system distributes trigger and gate signals to key subsystems, including the DAQ, klystrons, laser systems, pulsed kicker magnets, and interlocks. The LLRF system provides phase-coherent RF references and facility-wide clock distribution for synchronization. Achieving ~100 fs-level synchronization depends critically on the phase-noise power spectral density (PN-PSD) of the distributed clock signals and on preserving this performance throughout the distribution network. We present facility-wide measurements of the KEK ATF LLRF clock PN-PSD and discuss the resulting synchronization floor imposed by the stability of the ATF Linac and Damping Ring signal generators.
Paper Structure (7 sections, 3 figures, 1 table)

This paper contains 7 sections, 3 figures, 1 table.

Table of Contents

  1. Introduction
  2. KEK Accelerator Test Facility Low-Level RF clock distribution system
  3. KEK Accelerator Test Facility Linac branches
  4. KEK Accelerator Test Facility Damping Ring branches
  5. KEK Accelerator Test Facility Final Focus branches
  6. Conclusion
  7. Acknowledgement

Figures (3)

  • Figure 1: The KEK ATF Linac LLRF branches: (a) is the PN-PSDs with disabled FM, (b) is the PN-PSDs with enabled FM, (c) is the cumulative integrated jitter (upper bounded at 10 MHz) with disabled FM, (d) is the cumulative integrated jitter (upper bounded at 10 MHz) with enabled FM
  • Figure 2: The KEK DR LLRF branches: (a) is the PN-PSDs with disabled FM, (b) is the PN-PSDs with enabled FM, (c) is the cumulative integrated jitter (upper bounded at 10 MHz) with disabled FM, (d) is the cumulative integrated jitter (upper bounded at 10 MHz) with enabled FM
  • Figure 3: The KEK ATF FF LLRF branches: (a) is the PN-PSDs with disabled FM, (b) is the PN-PSDs with enabled FM, (c) is the cumulative integrated jitter (upper bounded at 10 MHz) with disabled FM, (d) is the cumulative integrated jitter (upper bounded at 10 MHz) with enabled FM