Batched First-Order Methods for Parallel LP Solving in MIP
Nicolas Blin, Stefano Gualandi, Christopher Maes, Andrea Lodi, Bartolomeo Stellato
TL;DR
We address the challenge of solving many related LPs arising in MIP by introducing a batched first-order method based on the primal-dual hybrid gradient (PDHG) algorithm, extended with Halpern restarts and per-subproblem batching to run efficiently on GPUs. The approach reformulates LPs into a saddle-point problem and exploits matrix-matrix operations to maximize GPU throughput, enabling exact or near-exact solutions for multiple subproblems such as full strong branching and OBBT. We demonstrate substantial speedups over traditional simplex-based methods, integrate BatchLP into cuOpt, and show promising results on MIPLIB 2017 instances, highlighting both the practical potential and the limitations dependent on problem structure and hardware. Overall, this work provides a scalable, GPU-optimized pathway for incorporating batched LP solves into MIP workflows, potentially reshaping how subproblem computations are allocated across CPU and GPU resources.
Abstract
We present a batched first-order method for solving multiple linear programs in parallel on GPUs. Our approach extends the primal-dual hybrid gradient algorithm to efficiently solve batches of related linear programming problems that arise in mixed-integer programming techniques such as strong branching and bound tightening. By leveraging matrix-matrix operations instead of repeated matrix-vector operations, we obtain significant computational advantages on GPU architectures. We demonstrate the effectiveness of our approach on various case studies and identify the problem sizes where first-order methods outperform traditional simplex-based solvers depending on the computational environment one can use. This is a significant step for the design and development of integer programming algorithms tightly exploiting GPU capabilities where we argue that some specific operations should be allocated to GPUs and performed in full instead of using light-weight heuristic approaches on CPUs.
