A biased-erasure cavity qubit with hardware-efficient quantum error detection

Abstract

Erasure qubits are beneficial for quantum error correction due to their relaxed threshold requirements. While dual-rail erasure qubits have been demonstrated with a strong error hierarchy in circuit quantum electrodynamics, biased-erasure qubits -- where erasures originate predominantly from one logical basis state -- offer further advantages. Here, we realize a hardware-efficient biased-erasure qubit encoded in the vacuum and two-photon Fock states of a single microwave cavity. The qubit exhibits an erasure bias ratio of over 265. By using a transmon ancilla for logical measurements and mid-circuit erasure detections, we achieve logical state assignment errors below 1% and convert over 99.3% leakage errors into detected erasures. After postselection against erasures, we achieve effective logical relaxation and dephasing rates of $(6.2~\mathrm{ms})^{-1}$ and $(3.1~\mathrm{ms})^{-1}$, respectively, which exceed the erasure error rate by factors of 31 and 15, establishing a strong error hierarchy within the logical subspace. These postselected error rates indicate a coherence gain of about 6.0 beyond the break-even point set by the best physical qubit encoded in the two lowest Fock states in the cavity. Moreover, randomized benchmarking with interleaved erasure detections reveals a residual logical gate error of 0.29%. This work establishes a compact and hardware-efficient platform for biased-erasure qubits, promising concatenations into outer-level stabilizer codes toward fault-tolerant quantum computation.

Figures (4)

• Figure 1: Experimental scheme of the biased-erasure 02 qubit.a. Schematic of an XZZX surface code using biased-erasure data qubits (white circles) and stabilizer measurement qubits (grey circles). The biased noise structure of the erasure qubits can be harnessed to improve QEC performance. b. Device schematic, consisting of a 3D coaxial stub cavity (red) for encoding the erasure qubit, a transmon ancilla (blue), and a readout resonator (green) for assisting the logical control and erasure detection. c. Energy-level diagram of the cavity mode. The logical basis states of the erasure qubit are $\left|0_\mathrm{L}\right\rangle = \left|0\right\rangle$ and $\left|1_\mathrm{L}\right\rangle = \left|2\right\rangle$ (green). Single-photon loss and gain errors would bring the logical states into leakage states $\left|1\right\rangle$ and $\left|3\right\rangle$, which can be detected and flagged as erasures. d. Logical Bloch sphere representation of the 02 qubit, with four cardinal states visualized using measured Wigner functions in phase space. e. Quantum circuit for state preparation, logical operations, and measurement of the 02 erasure qubit. State preparation is performed via QOC pulses, followed by ancilla and cavity checks to purify the initialization. Logical gates are also implemented using QOC pulses, interleaved with mid-circuit erasure detection. Final end-of-line logical measurement and state classification distinguish $\left|0_\mathrm{L}\right\rangle$, $\left|1_\mathrm{L}\right\rangle$, and the erasure state $\left|E\right\rangle$ based on all prior check outcomes.
• Figure 2: Characterization of erasure detection and logical measurement.a. Quantum circuit for quantifying logical assignment errors using cascaded photon-number modulo parity measurements (Supplementary Sec. II-B). The dashed box indicates the interleaved mid-circuit erasure detection used to characterize false-positive and false-negative probabilities. b. Error map between the prepared logical states (top) and the measured bitstrings (bottom) of the two parity measurements in a. Colored arrows denote different error types: logical assignment errors (red), erasure errors (blue), and leakage detection errors (green). c. Assigned measurement outcome fractions for prepared logical states $\left|0\right\rangle$ and $\left|2\right\rangle$ (left) and leakage states $\left|1\right\rangle$ and $\left|3\right\rangle$ (right) without mid-circuit erasure detection. d. Assigned erasure fractions of the mid-circuit erasure detection conditioned on the final logical measurement outcome when initially preparing logical states (left) and leakage states (right), respectively. The average false-positive and false-negative fractions are $(0.22 \pm 0.02)\%$ and $(0.69 \pm 0.03)\%$, respectively. Error bars represent $\pm 1 \sigma$ standard error. e. Experimental sequence for characterizing detection-induced dephasing. After preparing $\left|x_\mathrm{L}\right\rangle$, a variable number $M$ (even integer) of erasure checks are evenly inserted into an echoed sequence with a fixed total duration $\tau_{\mathrm{tot}} = 150$ µ$\mathrm{s}$; phase coherence of the logical state is extracted via Wigner tomography. f. Extracted phase coherence $\langle X_{\mathrm{L}}\rangle$ as a function of $M$. The coherence initially improves and then decays linearly with $M$, yielding an induced dephasing error of 0.26% per erasure detection.
• Figure 3: Measurement of logical relaxation and dephasing rates for the 02 erasure qubit.a. Experimental sequence for measuring the logical relaxation rate. An initial $\left|1_\mathrm{L}\right\rangle$ undergoes $M$ rounds of erasure detections at a fixed repetitive interval $\tau=11.9$ µ s. b. Measured postselected population in $\left|1_\mathrm{L}\right\rangle$ (blue circles) and survival probability (green triangles) as a function of the total evolution time. The fitting to the population in $\left|1_\mathrm{L}\right\rangle$ yields a residual relaxation rate of $(8.9 \pm 0.5~\mathrm{ms})^{-1}$. The survival probability is exponentially fitted, giving an erasure rate of $(197 \pm 0.2~\text{\textmu} \mathrm{s})^{-1}$. The error bars are smaller than the marker size and therefore not shown. c. Experimental sequence for characterizing logical dephasing rate: a Ramsey-type sequence (without logical $X_\mathrm{L}$) and a CPMG-type sequence (with inserted $X_\mathrm{L}$), both interleaved with repeated erasure detections. d. Measured phase coherence $\langle X_{\mathrm{L}}\rangle$ for the Ramsey (red squares) and CPMG (blue diamonds) sequences, both fitted exponentially. The extracted logical dephasing rates are $(3.1 \pm 0.2~\mathrm{ms})^{-1}$ and $(0.52 \pm 0.07 ~\mathrm{ms})^{-1}$, respectively. The error bars represent $\pm 1 \sigma$ standard errors obtained from bootstrapping. The shaded areas denote the 95% confidence prediction regions.
• Figure 4: Characterization of logical gate errors via randomized benchmarking.a. Quantum circuit for randomized benchmarking. Each Clifford gate is followed by a mid-circuit erasure detection to suppress leakage errors during gate operation. A final selective $\pi$-pulse is applied to measure the population in $\left|0_\mathrm{L}\right\rangle$. b. Measured survival probability (green triangles) and population in $\left|0_\mathrm{L}\right\rangle$ (blue circles) as a function of Clifford length $M$. An exponential fit to the survival probability gives an erasure rate of $(4.50 \pm 0.05) \times 10^{-2}$ per gate. The $\left|0_\mathrm{L}\right\rangle$ state population is fitted to an exponential decay function with an offset of 0.5, resulting in a residual error of $(2.86 \pm 0.07) \times 10^{-3}$ per gate. Error bars are smaller than the markers and thus are not shown. The shaded areas represent the 95% confidence prediction regions.