BrainFuse: a unified infrastructure integrating realistic biological modeling and core AI methodology

TL;DR

BrainFuse addresses the infrastructural gap between biophysical neural modeling and gradient-based artificial intelligence by delivering a unified platform that integrates Hodgkin-Huxley–level dynamics with differentiable learning, GPU-accelerated computation, and neuromorphic deployment. Through algorithmic refinement (discretization and exact HH gradients), architectural co-design, and system-level optimizations (GPU fusion, Triton backends, and C-based neuromorphic mapping), BrainFuse achieves up to $3{,}000\times$ GPU acceleration and enables large biophysically detailed networks (≈$38{,}000$ neurons, $10^8$ synapses) to run on a single neuromorphic chip at power as low as $1.98$ W. Across neuron, circuit, and cortical scales, it demonstrates improved noise robustness and practical real-world deployment, validating end-to-end workflows from detailed neuron simulation to on-chip operation. By open-sourcing and deep integration with modern AI tooling, BrainFuse aims to accelerate cross-disciplinary discovery and the development of next-generation bio-inspired intelligent systems.

Abstract

Neuroscience and artificial intelligence represent distinct yet complementary pathways to general intelligence. However, amid the ongoing boom in AI research and applications, the translational synergy between these two fields has grown increasingly elusive-hampered by a widening infrastructural incompatibility: modern AI frameworks lack native support for biophysical realism, while neural simulation tools are poorly suited for gradient-based optimization and neuromorphic hardware deployment. To bridge this gap, we introduce BrainFuse, a unified infrastructure that provides comprehensive support for biophysical neural simulation and gradient-based learning. By addressing algorithmic, computational, and deployment challenges, BrainFuse exhibits three core capabilities: (1) algorithmic integration of detailed neuronal dynamics into a differentiable learning framework; (2) system-level optimization that accelerates customizable ion-channel dynamics by up to 3,000x on GPUs; and (3) scalable computation with highly compatible pipelines for neuromorphic hardware deployment. We demonstrate this full-stack design through both AI and neuroscience tasks, from foundational neuron simulation and functional cylinder modeling to real-world deployment and application scenarios. For neuroscience, BrainFuse supports multiscale biological modeling, enabling the deployment of approximately 38,000 Hodgkin-Huxley neurons with 100 million synapses on a single neuromorphic chip while consuming as low as 1.98 W. For AI, BrainFuse facilitates the synergistic application of realistic biological neuron models, demonstrating enhanced robustness to input noise and improved temporal processing endowed by complex HH dynamics. BrainFuse therefore serves as a foundational engine to facilitate cross-disciplinary research and accelerate the development of next-generation bio-inspired intelligent systems.

Figures (7)

• Figure 1: Overview of BrainFuse. (a) Existing neural simulation and AI tooling ecosystems substantially facilitate their respective research domains; however, support for complementary functionalities and their integration remains limited. This gap hinders interdisciplinary research between neuroscience and AI. BrainFuse integrates the core functionalities of both sides, providing a user-friendly and efficient interface to model biologically detailed neuron models and train them with standard gradient-based methods. (b) By integrating neuromorphic hardware support, BrainFuse will enable and facilitate the exploration and development of real-world bio-inspired intelligence. (c) Comparison of properties between other frameworks for neuron modelingfangSpikingJellyOpensourceMachine2023hinesNEURONSimulation1997gewaltigNESTNeuralSimulation2007 and ours. A detailed comparison is presented in Supplementary Table \ref{['table:feat-comp']}. (d) Architectural design of BrainFuse. The deep integration with modern AI frameworks (PyTorch, Triton) ensures compatibility with a broad range of hardware. A standard C language migration enables BrainFuse to be deployed on customized neuromorphic chips with a C compiler. (e) Python code demo to implement a neural network model with HH neurons. (f) Computational efficiency comparison between the HH neuron defined in BrainFuse (Triton and CuPy) and the LIF neuron from SpikingJellyfangSpikingJellyOpensourceMachine2023 (CuPy). We compressed the computational cost of HH to a comparable level with efficient LIF.
• Figure 2: Robust sequential learning with BrainFuse and analysis of underlying principles. (a) Performance on multiple standard sequential learning tasks of HH models and LIF models, evaluated on clean and noisy test sets. The models are built with BrainFuse and trained on clean training data. The results show that HH neurons generally outperform LIF under both clean inputs and noisy inputs, indicating stronger robustness and representational capacity. A detailed comparison between the refined HH models and advanced Spiking Neural Network (SNN) models is provided in Supplementary Table \ref{['table:ml_results']}. The applied noise is task category-specific and described in Methods. (b) Example images from the CIFAR10-C datasethendrycksBenchmarkingNeuralNetwork2019 under severity 4 (amplitude of perturbation, defined in CIFAR10-C dataset). (c) Noise robustness comparison on CIFAR10-C. HH exhibits greater robustness than LIF, with lower performance degradation under most corruptions. (d) Responses of HH neurons with different membrane capacitances to small perturbations. Neurons with larger membrane capacitance exhibit higher responsiveness. "th" stands for threshold. (e) Simplified phase portraits of HH neurons with different membrane capacitances. Neurons with larger membrane capacitance exhibit a steeper separatrix (green dashed lines), making their spiking behavior more susceptible to changes by perturbed input currents. (f) Comparison of neuronal behavior in SHD tasks with and without added noise (pepper). The HH neuron’s activity is less affected by input with noise. Spikes of the LIF neuron are indicated by scatter markers (S in the legend), with shaded regions highlighting changed spikes evoked by noise.
• Figure 3: Neuron scale: L5PC neuron modeling with BrainFuse. (a) Morphological structure of the L5PC neuron. (b) Network architecture designed to model L5PC neuronal activity. Input spikes are convolved with an exponential synaptic kernel and then passed through a fully connected dendritic layer to generate a single-channel somatic input. The point spiking neuron produces both membrane potential and spike outputs (see Methods for detailed setups). (c) Visualization of dendritic input spike trains. The y-axis represents different input channels corresponding to distinct synapse types (excitatory/inhibitory). (d) Comparison between predicted and simulated membrane potential traces. HH model tracks the ground-truth activities more closely than the LIF model. (e) Symmetric Mean Absolute Percentage Error (sMAPE) comparison between HH and LIF models in fitting L5PC membrane potentials under identical architectures and training conditions. In the boxplot, the center line denotes the median, box edges delineate interquartile ranges (IQRs, 0.25-0.75), and whiskers extend from the minimum to the 0.95 maximum values. ****P < 0.0001 “Condition” refers to the configuration used in NEURON simulations: “Std” for the standard condition, “Sub” for the subthreshold condition, “Ood” for the out-of-distribution condition, and “Erg” for the ergodic condition. (f) Distribution of spike-time prediction errors ($t_{\text{pred}} - t_{\text{true}}$) for HH and LIF models, in which y-axis indicates the relative frequency of timing deviations. The “Sub” condition is omitted due to the absence of spikes. The “Denote” panel illustrates the evaluation criteria: a distribution centered near zero (small bias) and sharply peaked (small width) reflects high temporal prediction accuracy and stability. The “Std” condition shows small distribution values due to low spike recall rates: when no spike is predicted within the evaluation window around an actual spike, the case is excluded from spike-time error analysis.
• Figure 4: Circuit scale: C. elegans sensory-motor circuit modeling with BrainFuse. (a) Schematic chart of the sensory-locomotion neural circuit. (b) The structure of the neural circuit and the modeling scheme. The abbreviations in the boxes represent specific neurons in the C. elegans nervous system, where X represents multiple related neurons (see Methods for details). We take calcium imaging traces of the sensory neurons as input, command interneurons as output, and model the functionality of primary and secondary interneurons using an SNN multilayer perceptron (MLP) model. (c) Scheme of data preprocessing. We segmented the long traces into shorter shards and preserved an unsupervised padding at the beginning of each sample pair. No supervised output overlaps among samples. (d) Comparison of fitting error between HH and LIF, where the x ticks are different output neurons and their average. The HH model consistently tracks the biological recordings more precisely than LIF. In boxplot, the center line is the median, box edges delineate interquartile ranges (IQRs, 0.25-0.75) and whiskers extend from minimum to 0.95 maximum values, ****P < 0.0001. (e) Verification of hyperparameter sensitivity. For different model depths and widths, HH achieves lower error than LIF in all configurations. For hidden neuron trials (changing the number of neruons in one hidden layer), the depth is fixed to 3. For hidden layer trials, the width is fixed to 64.
• Figure 5: Cortical & subcellular scale: scalability in network connection and neuronal morphology with BrainFuse. (a) Configuration of the cerebral cortex network simulation. The network is composed of excitatory and inhibitory neurons from 4 cortical layers. These 8 neuron populations are connected using the modeled connectivity probability and latency distributions, described in reference workpotjansCell-type2014. (b) Comparison of firing rate statistics between the reference work's result and ours, in the resting state simulation. In the boxplot, the center line is the median, star is the average, box edges delineate interquartile ranges (IQRs, 0.25-0.75), and whiskers extend from minimum to 0.95 maximum values. (c) Raster plot of model response with transient thalamo-cortical input stimulation, reproduced by our model based on BrainFuse. (d) Relation between simulated model size and per-iteration overhead allocation. The actual time cost is marked by the shadow area. GPUs will outperform CPUs at roughly $10\times$ larger model size, indicating promising scalability. (e) Diagram of CPU and GPU bottleneck situation. For each executed operation (Op.), the slowest one of the host and devices (GPU) determines the launch time of the next Op. GPU waiting leads to lower utilization and simulation throughput. (f) Comparison of power consumption and simulation throughput. The baseline results are estimated from the referenced work, conducting the simulation on a 48-CPU cluster. Our results are based on BrainFuse with a single NVIDIA 3090 GPU. This comparison indicates BrainFuse's advantages of energy-efficiency and batched throughput. (g) Diagram of the spatially discretized neuron morphology and the stimuli scheme. (h) Soma responds differently with the same input pattern applied to different positions. The vertical shadows label the simulation timing. Trials (1) and (2) have identical stimulus durations and intervals between the two stimuli. The difference in spike arrival timings at the soma leads to different responses (D2-C1 trace also plotted in D3-C1 panel with gray dotted line to assist timing comparison, denoted by blue boxes). See the animation of this simulation in Supplementary Movie S1.