End-to-End Fidelity Analysis of Quantum Circuit Optimization: From Gate-Level Transformations to Pulse-Level Control

TL;DR

End-to-end fidelity of quantum circuit optimization is analyzed across the full compilation stack using a modular qco-integration framework that connects gate-level optimization with Lindblad-based pulse simulations. The study benchmarks four passes (gate cancellation, commutation, rotation merging, identity elimination) on 371 circuits targeting IQM Garnet hardware and reports gate cancellation as the most impactful, eliminating 14,024 gates and improving about 68% of circuits. Pulse duration shows the strongest negative correlation with process fidelity, with $r=-0.74$ and $R^2=0.55$, indicating decoherence during pulse execution dominates errors. Hardware validation on the IQM Resonance Garnet 20-qubit processor confirms substantial gate reductions on QFT circuits (about 70%), and the authors provide an open-source benchmarking framework for end-to-end quantum compilation research.

Abstract

We present a comprehensive analysis of quantum circuit fidelity across the full compilation stack, from high-level gate optimization through pulse-level control. Using a modular integration framework connecting a C++ circuit optimizer with Lindblad-based pulse simulation, we systematically evaluate the fidelity impact of four optimization passes: gate cancellation, commutation, rotation merging, and identity elimination, on IQM Garnet hardware parameters. Our simulation campaign spanning 371 circuit runs reveals that gate cancellation provides the most significant improvement (68\% of circuits improved, 14,024 gates eliminated), while pulse duration exhibits the strongest negative correlation with process fidelity ($r = -0.74$, $R^2 = 0.55$). We validate these findings through hardware execution on the IQM Resonance Garnet 20-qubit processor, demonstrating 70\% gate reduction on QFT circuits with 100\% job success rate (8 executions). Our open-source framework enables reproducible benchmarking of quantum compilation pipelines.

Figures (6)

• Figure 1: End-to-end pipeline architecture. Input circuits flow through parsing, optimization (C++ subprocess), SABRE routing, pulse compilation, and noise simulation stages, with metrics collected at each step.
• Figure 2: Optimization pass effectiveness measured by net gate reduction. Error bars indicate standard deviation across the circuit corpus.
• Figure 3: Waterfall diagram showing fidelity contributions from each pipeline stage. Two-qubit gate errors dominate the fidelity budget.
• Figure 4: Process fidelity versus qubit count, grouped by circuit type. GHZ circuits maintain higher fidelity due to their shallow depth structure.
• Figure 5: Process fidelity comparison between baseline (no optimization) and optimized circuits using the best pass sequence.