On Efficient Polyphase Network Implementation Using Successive Vector Approximation
Luiz F. da S. Coelho, Didier Le Ruyet, Paulo S. R. Diniz
TL;DR
This work targets energy-efficient multiplierless implementation of the FBMC polyphase network for OQAM-FBMC systems by introducing SOPOT-based vector approximations. It develops two greedy algorithms, Signed Digit Loading (SDL) and Matching Pursuits with Generalized Bit Planes (MPGBP), and provides a detailed comparison against the canonical signed-digit (CSD) approach. The results show vector-based SOPOT approximations yield significantly lower mean-squared error and interference, with substantially better OOB radiation characteristics at similar computational costs, especially for PHYDYAS prototypes. Practically, the methods enable low-cost, low-energy transceivers suitable for wideband, power-constrained deployments while maintaining BER performance across modulation scenarios.
Abstract
In this work, we explore an energy-efficient implementation of the polyphase network for a filter bank multicarrier (FBMC) system. The network is approximated using a greedy algorithm based on matching pursuits (MP) that converts the numerical representation directly from floating point to sum of signed powers of two (SOPOT), which is key for a multiplierless implementation. We compare this technique with other state-of-the-art methods for designing multiplierless hardware, and show that our technique achieves superior performance with similar computational complexity.
