Scalable Multi-QPU Circuit Design for Dicke State Preparation: Optimizing Communication Complexity and Local Circuit Costs

TL;DR

This work tackles scalable preparation of large-qubit Dicke states $D(n,k)$ by distributing the task across $p$ QPUs, balancing inter-QPU communication against local circuit costs. The authors introduce a distributed circuit that achieves $\mathsf{c.c.}=O(p\log k)$ while maintaining polynomial intra-QPU size $O(nk)$ and depth $O(p^2 k + \log k \log(n/k))$, with each QPU holding about $\lceil n/p\rceil$ qubits. A CP-rank–based lower bound on communication cost is established for general target states, and for the special case $p=2$ the bound reduces to $\lceil\log (k+1)\rceil$, which their construction meets, demonstrating optimality in this setting. The results have practical impact for quantum metrology and networking, enabling scalable Dicke-state preparation across distributed hardware and providing a theoretical framework (CP-rank) to assess fundamental limits of distributed state synthesis across multiple QPUs.

Abstract

Preparing large-qubit Dicke states is of broad interest in quantum computing and quantum metrology. However, the number of qubits available on a single quantum processing unit (QPU) is limited -- motivating the distributed preparation of such states across multiple QPUs as a practical approach to scalability. In this article, we investigate the distributed preparation of $n$-qubit $k$-excitation Dicke states $D(n,k)$ across a general number $p$ of QPUs, presenting a distributed quantum circuit (each QPU hosting approximately $\lceil n/p \rceil$ qubits) that prepares the state with communication complexity $O(p \log k)$, circuit size $O(nk)$, and circuit depth $O\left(p^2 k + \log k \log (n/k)\right)$. To the best of our knowledge, this is the first construction to simultaneously achieve logarithmic communication complexity and polynomial circuit size and depth. We also establish a lower bound on the communication complexity of $p$-QPU distributed state preparation for a general target state. This lower bound is formulated in terms of the canonical polyadic rank (CP-rank) of a tensor associated with the target state. For the special case $p = 2$, we explicitly compute the CP-rank corresponding to the Dicke state $D(n,k)$ and derive a lower bound of $\lceil\log (k + 1)\rceil$, which shows that the communication complexity of our construction matches this fundamental limit.

Figures (7)

• Figure 1: Phase 1. Using the quantum state preparation circuit for a general state, $\mathsf{QPU}_0$ distributes the amplitudes according to $D(n/2, j)$ and $D(n/2, k - j)$, which are prepared on $\mathsf{QPU}_0$ and $\mathsf{QPU}_1$, respectively. Subsequently, $\mathsf{QPU}_0$ "sends" the $\ket{j}$ register to $\mathsf{QPU}_1$, thereby assigning the corresponding task that $\mathsf{QPU}_1$ must complete. After the minus circuit, the roles of $\mathsf{QPU}_0$ and $\mathsf{QPU}_1$ in the subsequent phases become symmetric; specifically, each performs the mapping $\ket{j} \mapsto D(n/2, j)$ using ancillary qubits.
• Figure 2: An example of Phase 2 for $k = 3$. The key observation is that, under the one-hot encoding, the operation $+2^l$, and hence $+ j_l \times 2^l$, can be implemented straightforwardly using swap and controlled-swap gates, respectively. Moreover, the state of the control qubit $\ket{j_l}$ can be inferred by detecting the presence of a swap operation, which reduces the number of ancillary qubits required from $O(\log k)$ to $O(1)$.
• Figure 3: The subcircuit handling $\ket{j_l}$ in Phase 2. After each such subcircuit, the number of qubits used for the one-hot encoding doubles, while the number of qubits used for the binary encoding decreases by one. The qubit freed from the binary encoding is repurposed for the one-hot encoding, except for the most significant qubit, $\ket{j_{\lceil \log (k+1)\rceil - 1}}$. In addition to the qubit representing $0$ in the one-hot encoding, a total of two ancillary qubits are required.
• Figure 4: Phase 3. The downstairs CNOT gates transform the one-hot encoding into the unary encoding, introducing an additional $1$ due to the representation of $0$ in the one-hot encoding. The subsequent $X$ gate removes this extra $1$. After this correction, the Dicke unitary, implemented in a non-distributed manner, can be applied directly.
• Figure 5: Modified Phase 1 for the general $p$-QPU case. The first $\lceil \log (k+1) \rceil$ qubits in $\mathsf{QPU}_i$ are used to encode $\ket{j_i}$, which specifies the local state $D(n/p, j_i)$ to be prepared in the subsequent phases. $\mathsf{QPU}_0$ allocates the amplitudes of $\ket{j_0}$ using the subcircuit QSP. For $i = 1, 2, \dots, p-2$, $\mathsf{QPU}_i$ allocates the amplitudes of $\ket{j_i}$ and computes the partial sum $\ket{J_i}$ within the subcircuit $V_i$ (See Figure \ref{['fig:pQPUphase1V']}.), using $\ket{J_{i-1}}$ as input, where the register $\ket{J_{i-1}}$ is copied to a second set of $\lceil \log (k+1) \rceil$ qubits by $\mathsf{QPU}_{i-1}$. The final processor, $\mathsf{QPU}_{p-1}$, only needs to compute $\ket{j_{p-1}}$ via the subcircuit $A$, which implements the operation $k - J_{p-2}$. Finally, the temporarily stored partial sums are uncomputed using the subcircuits $W_i$ (See Figure \ref{['fig:pQPUphase1W']}.) for $i = p-2, p-3, \dots, 1$, followed by a final layer of $\lceil \log (k+1) \rceil$ CNOT gates to complete the cleanup.

Theorems & Definitions (24)

• Definition 1: Circuit Size
• Definition 2: Circuit Depth
• Definition 3: Communication Complexity
• Definition 4: Hamming Weight
• Definition 5: Dicke State
• Definition 6: Dicke Unitary
• Lemma 1: yuan2025depth
• Definition 7: Tensor
• Definition 8: Canonical Polyadic Rank (CP-rank)
• Lemma 2: State Preparation, sun2023asymptoticallyyuan2023optimal