ALD-Derived WO3-x Leads to Nearly Wake-Up-Free Ferroelectric Hf0.5Zr0.5O2 at Elevated Temperatures

Abstract

Breaking the memory wall in advanced computing architectures will require complex 3D integration of emerging memory materials such as ferroelectrics-either within the back-end-of-line (BEOL) of CMOS front-end processes or through advanced 3D packaging technologies. Achieving this integration demands that memory materials exhibit high thermal resilience, with the capability to operate reliably at elevated temperatures such as 125C, due to the substantial heat generated by front-end transistors. However, silicon-compatible HfO2-based ferroelectrics tend to exhibit antiferroelectric-like behavior in this temperature range, accompanied by a more pronounced wake-up effect, posing significant challenges to their thermal reliability. Here, we report that by introducing a thin tungsten oxide (WO3-x) layer-known as an oxygen reservoir-and carefully tuning its oxygen content, ultra-thin Hf0.5Zr0.5O2 (5 nm) films can be made robust against the ferroelectric-to-antiferroelectric transition at elevated temperatures. This approach not only minimizes polarization loss in the pristine state but also effectively suppresses the wake-up effect, reducing the required wake-up cycles from 105 to only 10 at 125C- a qualifying temperature for back-end memory integrated with front-end logic, as defined by the JEDEC standard. First-principles density functional theory calculations reveal that WO3 enhances the stability of the ferroelectric orthorhombic phase at elevated temperatures by increasing the tetragonal-to-orthorhombic phase energy gap, and promoting favorable phonon mode evolution, thereby supporting o-phase formation under both thermodynamic and kinetic constraints.

Figures (7)

• Figure 1: Importance of high temperature performance enhancement of ferroelectric memories. (a) Schematic of 3D integration of memory on logic architecture. Memories away from heat sink gets heated due to the heated logic die. (b) Operating temperatures of Micron DRAMs based on different applications.
• Figure 2: Device structures and material characterization of ferroelectric capacitors. (a) Fabrication process of O2 plasma and ALD based WO3-x devices. (b-d) Cross-sectional STEM images of (b) reference, (c) O2 plasma and (d) ALD based 6 nm WO3-x devices along with their EDS characterization. Material-count map coming from Zr (green), W (yellow) and O (blue) and the corresponding line scans for (b) reference, (c) O2 Plasma and (d) ALD devices. The line scans on the right of each material count map further confirms the layers and their interfaces. XPS spectra obtained from W 4f and O 1s orbitals of WO3-x from (e) O2 plasma and , (f) ALD based 6nm WO3-x samples. (e,f) Magenta, blue and green curves in the O 1s plot are the de-convoluted peaks corresponding to M-O, non-lattice Oxygen (Vo) and -OH respectively. (g) Table showing the percentage obtained from the deconvoluted peaks of O 1s scan of different samples.
• Figure 3: Electrical characterization at room temperature. PV loops after 105 cycles from (a) reference, (b) O2 plasma-, ALD based (c) 5 nm and (d) 6 nm WO3-x devices. 2Pr values are extracted from PUND measurement.
• Figure 4: Temperature dependent polarization and switching current characteristics at pristine state. P-V and ISW-V characteristics at (a-c) 25 and (d-f) 85° C from (a,d) reference, (b,e) O2 plasma- and (c,f) ALD- based WO3-x devices respectively. (g-h) Polarization switched with 200ns pulses at different voltages measured at 25 and 125° C respectively on pristine devices. (i) 2Pr obtained from PUND measurement with 2V/10 $\mu$s square pulses at different temperatures at pristine state.
• Figure 5: Grazing incident X-ray diffraction (GI-XRD) from the HZO film of reference, O2 plasma and ALD based 6 nm WO3-x samples at (a) 25, (b) 85 and (c) 125° C. (d) Dominant peak (o-111/t-101) position of all the samples at different temperatures obtained from (a)-(c).