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Quantum Circuit Pre-Synthesis: Learning Local Edits to Reduce $T$-count

Daniele Lizzio Bosco, Lukasz Cincio, Giuseppe Serra, M. Cerezo

TL;DR

This work tackles the high cost of fault-tolerant quantum computation dominated by $T$-gates by introducing Q-PreSyn, a synthesis-agnostic pre-processing stage that optimizes circuit representations before local Clifford+$T$ synthesis. By performing unitary-preserving merges (single- and two-qubit) and framing the search as a plan-optimization problem, the authors leverage reinforcement learning (PPO) to discover sequences of edits that lower the post-synthesis $T$-count. Across multiple synthesis backends (including gridsynth, BQSKit, and Solovay-Kitaev) and circuit families, the approach yields typical improvements in the $T$-count of 10–25%, with RL-based plans outperforming greedy baselines and maintaining error budgets. The framework is general, scalable to various tasks (random circuits, linear connectivity, real-time Ising dynamics, and matchgates), and supported by memoization to mitigate computational cost, offering a practical route to more efficient fault-tolerant quantum compilation.

Abstract

Compiling quantum circuits into Clifford+$T$ gates is a central task for fault-tolerant quantum computing using stabilizer codes. In the near term, $T$ gates will dominate the cost of fault tolerant implementations, and any reduction in the number of such expensive gates could mean the difference between being able to run a circuit or not. While exact synthesis is exponentially hard in the number of qubits, local synthesis approaches are commonly used to compile large circuits by decomposing them into substructures. However, composing local methods leads to suboptimal compilations in key metrics such as $T$-count or circuit depth, and their performance strongly depends on circuit representation. In this work, we address this challenge by proposing \textsc{Q-PreSyn}, a strategy that, given a set of local edits preserving circuit equivalence, uses a RL agent to identify effective sequences of such actions and thereby obtain circuit representations that yield a reduced $T$-count upon synthesis. Experimental results of our proposed strategy, applied on top of well-known synthesis algorithms, show up to a $20\%$ reduction in $T$-count on circuits with up to 25 qubits, without introducing any additional approximation error prior to synthesis.

Quantum Circuit Pre-Synthesis: Learning Local Edits to Reduce $T$-count

TL;DR

This work tackles the high cost of fault-tolerant quantum computation dominated by -gates by introducing Q-PreSyn, a synthesis-agnostic pre-processing stage that optimizes circuit representations before local Clifford+ synthesis. By performing unitary-preserving merges (single- and two-qubit) and framing the search as a plan-optimization problem, the authors leverage reinforcement learning (PPO) to discover sequences of edits that lower the post-synthesis -count. Across multiple synthesis backends (including gridsynth, BQSKit, and Solovay-Kitaev) and circuit families, the approach yields typical improvements in the -count of 10–25%, with RL-based plans outperforming greedy baselines and maintaining error budgets. The framework is general, scalable to various tasks (random circuits, linear connectivity, real-time Ising dynamics, and matchgates), and supported by memoization to mitigate computational cost, offering a practical route to more efficient fault-tolerant quantum compilation.

Abstract

Compiling quantum circuits into Clifford+ gates is a central task for fault-tolerant quantum computing using stabilizer codes. In the near term, gates will dominate the cost of fault tolerant implementations, and any reduction in the number of such expensive gates could mean the difference between being able to run a circuit or not. While exact synthesis is exponentially hard in the number of qubits, local synthesis approaches are commonly used to compile large circuits by decomposing them into substructures. However, composing local methods leads to suboptimal compilations in key metrics such as -count or circuit depth, and their performance strongly depends on circuit representation. In this work, we address this challenge by proposing \textsc{Q-PreSyn}, a strategy that, given a set of local edits preserving circuit equivalence, uses a RL agent to identify effective sequences of such actions and thereby obtain circuit representations that yield a reduced -count upon synthesis. Experimental results of our proposed strategy, applied on top of well-known synthesis algorithms, show up to a reduction in -count on circuits with up to 25 qubits, without introducing any additional approximation error prior to synthesis.
Paper Structure (28 sections, 8 equations, 10 figures, 3 algorithms)

This paper contains 28 sections, 8 equations, 10 figures, 3 algorithms.

Table of Contents

  1. Introduction
  2. Results
  3. Related Work
  4. Approximate Circuit Synthesis
  5. Pre-synthesis via reinforcement learning
  6. Actions
  7. Plans as sequences of actions
  8. Exploring the plan space
  9. Greedy search.
  10. Reinforcement learning search.
  11. Refining reinforcement learning plans.
  12. Memoization
  13. Experimental Setting
  14. Local Synthesis Algorithms for Clifford+$T$
  15. Matchgate Synthesis
  16. ...and 13 more sections

Figures (10)

  • Figure 1: Description of Q-PreSyn applied in a default synthesis pipeline. Starting from the initial circuit representation, given a blackbox local synthesis algorithm, we explore the space of equivalent representations to find the ones that lead to a reduced $T$-count after the synthesis. We show that our methodology reduces both the number of $T$
  • Figure 2: Effect of the actions Merge$(1,2)$ and Merge$(2,3)$ on an example circuit. First, the largest selection of gates is performed. Then, the selected gates are combined in a single unitary $U$. See Algorithm \ref{['alg:two_qubit_merge_contiguous']} in the Methods Section for more details.
  • Figure 3: Scheme of the proposed pipeline. The RL agent proposes local edit operations on an input circuit $C$, generating equivalent representations $C_{\pi}$. Each modified circuit is compiled by a synthesis algorithm $\mathcal{A}(C_{\pi})$ and evaluated according to a cost function $\mathcal{L}$, typically reflecting the $T$-count. Feedback from this evaluation is used to update the agent’s policy, iteratively improving performance and yielding an optimized output circuit $\tilde{C} = \mathcal{A}(C_{\pi^*})$. See Algorithm \ref{['alg:merge_synthesize']} in the Methods Section for the pseudocode.
  • Figure 4: Results for random circuit synthesis (Task \ref{['subsec:TASKA']}). Average of final $T$-count (a), $T$-count reduction in percentage (b), and plan length (c).
  • Figure 5: Computational time for random circuit synthesis (Task \ref{['subsec:TASKA']}). The dashed line, corresponding to the refinement time, is computed as the time required by the greedy refinement process after the training of the RL agent.
  • ...and 5 more figures

Theorems & Definitions (1)

  • Definition 1: Plan