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Report for NSF Workshop on AI for Electronic Design Automation

Deming Chen, Vijay Ganesh, Weikai Li, Yingyan Celine Lin, Yong Liu, Subhasish Mitra, David Z. Pan, Ruchir Puri, Jason Cong, Yizhou Sun

TL;DR

The report addresses the urgent need to automate chip design through AI by surveying four thematic areas: AI for physical synthesis/DFM, AI for high-level and logic-level synthesis, an AI toolbox for optimization, and AI for test and verification. It synthesizes current efforts, key bottlenecks, and cross-disciplinary opportunities, while detailing actionable NSF recommendations to bolster foundational AI for EDA, data infrastructures, open benchmarks, scalable compute, and workforce development. The work emphasizes neurosymbolic and multi-modal approaches, agentic AI, and end-to-end design automation as pathways to dramatically reduce design cycles and improve yield and reliability. Collectively, these insights aim to democratize hardware design, accelerate next-generation DSAs, and enable robust, secure, energy-efficient computing systems.

Abstract

This report distills the discussions and recommendations from the NSF Workshop on AI for Electronic Design Automation (EDA), held on December 10, 2024 in Vancouver alongside NeurIPS 2024. Bringing together experts across machine learning and EDA, the workshop examined how AI-spanning large language models (LLMs), graph neural networks (GNNs), reinforcement learning (RL), neurosymbolic methods, etc.-can facilitate EDA and shorten design turnaround. The workshop includes four themes: (1) AI for physical synthesis and design for manufacturing (DFM), discussing challenges in physical manufacturing process and potential AI applications; (2) AI for high-level and logic-level synthesis (HLS/LLS), covering pragma insertion, program transformation, RTL code generation, etc.; (3) AI toolbox for optimization and design, discussing frontier AI developments that could potentially be applied to EDA tasks; and (4) AI for test and verification, including LLM-assisted verification tools, ML-augmented SAT solving, security/reliability challenges, etc. The report recommends NSF to foster AI/EDA collaboration, invest in foundational AI for EDA, develop robust data infrastructures, promote scalable compute infrastructure, and invest in workforce development to democratize hardware design and enable next-generation hardware systems. The workshop information can be found on the website https://ai4eda-workshop.github.io/.

Report for NSF Workshop on AI for Electronic Design Automation

TL;DR

The report addresses the urgent need to automate chip design through AI by surveying four thematic areas: AI for physical synthesis/DFM, AI for high-level and logic-level synthesis, an AI toolbox for optimization, and AI for test and verification. It synthesizes current efforts, key bottlenecks, and cross-disciplinary opportunities, while detailing actionable NSF recommendations to bolster foundational AI for EDA, data infrastructures, open benchmarks, scalable compute, and workforce development. The work emphasizes neurosymbolic and multi-modal approaches, agentic AI, and end-to-end design automation as pathways to dramatically reduce design cycles and improve yield and reliability. Collectively, these insights aim to democratize hardware design, accelerate next-generation DSAs, and enable robust, secure, energy-efficient computing systems.

Abstract

This report distills the discussions and recommendations from the NSF Workshop on AI for Electronic Design Automation (EDA), held on December 10, 2024 in Vancouver alongside NeurIPS 2024. Bringing together experts across machine learning and EDA, the workshop examined how AI-spanning large language models (LLMs), graph neural networks (GNNs), reinforcement learning (RL), neurosymbolic methods, etc.-can facilitate EDA and shorten design turnaround. The workshop includes four themes: (1) AI for physical synthesis and design for manufacturing (DFM), discussing challenges in physical manufacturing process and potential AI applications; (2) AI for high-level and logic-level synthesis (HLS/LLS), covering pragma insertion, program transformation, RTL code generation, etc.; (3) AI toolbox for optimization and design, discussing frontier AI developments that could potentially be applied to EDA tasks; and (4) AI for test and verification, including LLM-assisted verification tools, ML-augmented SAT solving, security/reliability challenges, etc. The report recommends NSF to foster AI/EDA collaboration, invest in foundational AI for EDA, develop robust data infrastructures, promote scalable compute infrastructure, and invest in workforce development to democratize hardware design and enable next-generation hardware systems. The workshop information can be found on the website https://ai4eda-workshop.github.io/.
Paper Structure (18 sections)