Table of Contents
Fetching ...

Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability

George Rafael Gourdoumanis, Fotoini Oikonomou, Maria Pantazi-Kypraiou, Pavlos Stoikos, Olympia Axelou, Athanasios Tziouvaras, Georgios Karakonstantis, Tahani Aladwani, Christos Anagnostopoulos, Yixian Shen, Anuj Pathania, Alberto Garcia-Ortiz, George Floros

TL;DR

The paper argues that continued semiconductor scaling requires reliable 2.5D/3D chiplet designs and introduces COIN-3D, a Horizon Europe Twinning project to build open-source EDA tools for reliability assessment across device-to-system levels. It presents 3DPX as an open, hierarchical 3D physical design exploration framework, electromigration-aware reliability modeling combining physics with machine learning, and a system-level reliability stack including a die-centric PDN generator and cross-layer feedback between architectural simulators and reliability engines. These contributions enable multi-PDK, multi-tier exploration and accelerate reliability-aware design in 3D chiplets, supported by structured European collaboration, training, and knowledge-sharing activities. The work aims to strengthen Europe’s autonomy in advanced semiconductor design by delivering scalable, open tools and methodologies that integrate physical phenomena with system-level behavior. The envisioned impact includes reduced design iterations, better predictability of aging and EM effects, and a foundation for sustainable, AI-aware reliability design flows across 2.5D/3D architectures.

Abstract

As semiconductor manufacturing advances from the 3-nm process toward the sub-nanometer regime and transitions from FinFETs to gate-all-around field-effect transistors (GAAFETs), the resulting complexity and manufacturing challenges continue to increase. In this context, 3D chiplet-based approaches have emerged as key enablers to address these limitations while exploiting the expanded design space. Specifically, chiplets help address the lower yields typically associated with large monolithic designs. This paradigm enables the modular design of heterogeneous systems consisting of multiple chiplets (e.g., CPUs, GPUs, memory) fabricated using different technology nodes and processes. Consequently, it offers a capable and cost-effective strategy for designing heterogeneous systems. This paper introduces the Horizon Europe Twinning project COIN-3D (Collaborative Innovation in 3D VLSI Reliability), which aims to strengthen research excellence in 2.5D/3D VLSI systems reliability through collaboration between leading European institutions. More specifically, our primary scientific goal is the provision of novel open-source Electronic Design Automation (EDA) tools for reliability assessment of 3D systems, integrating advanced algorithms for physical- and system-level reliability analysis.

Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability

TL;DR

The paper argues that continued semiconductor scaling requires reliable 2.5D/3D chiplet designs and introduces COIN-3D, a Horizon Europe Twinning project to build open-source EDA tools for reliability assessment across device-to-system levels. It presents 3DPX as an open, hierarchical 3D physical design exploration framework, electromigration-aware reliability modeling combining physics with machine learning, and a system-level reliability stack including a die-centric PDN generator and cross-layer feedback between architectural simulators and reliability engines. These contributions enable multi-PDK, multi-tier exploration and accelerate reliability-aware design in 3D chiplets, supported by structured European collaboration, training, and knowledge-sharing activities. The work aims to strengthen Europe’s autonomy in advanced semiconductor design by delivering scalable, open tools and methodologies that integrate physical phenomena with system-level behavior. The envisioned impact includes reduced design iterations, better predictability of aging and EM effects, and a foundation for sustainable, AI-aware reliability design flows across 2.5D/3D architectures.

Abstract

As semiconductor manufacturing advances from the 3-nm process toward the sub-nanometer regime and transitions from FinFETs to gate-all-around field-effect transistors (GAAFETs), the resulting complexity and manufacturing challenges continue to increase. In this context, 3D chiplet-based approaches have emerged as key enablers to address these limitations while exploiting the expanded design space. Specifically, chiplets help address the lower yields typically associated with large monolithic designs. This paradigm enables the modular design of heterogeneous systems consisting of multiple chiplets (e.g., CPUs, GPUs, memory) fabricated using different technology nodes and processes. Consequently, it offers a capable and cost-effective strategy for designing heterogeneous systems. This paper introduces the Horizon Europe Twinning project COIN-3D (Collaborative Innovation in 3D VLSI Reliability), which aims to strengthen research excellence in 2.5D/3D VLSI systems reliability through collaboration between leading European institutions. More specifically, our primary scientific goal is the provision of novel open-source Electronic Design Automation (EDA) tools for reliability assessment of 3D systems, integrating advanced algorithms for physical- and system-level reliability analysis.
Paper Structure (13 sections, 2 figures)