Improving the electrical conductivity of Pt nanowires deposited by focused electron beam induced deposition using thermal annealing

TL;DR

This work tackles the carbon-induced low conductivity of FEBID Pt nanowires by applying in-air annealing at 225°C for 4 h, achieving dramatic purification and conductivity improvements. The authors demonstrate that annealing purges carbon, increases Pt content, and induces substantial yet controlled geometric shrinkage, resulting in continuous Pt nanowires with resistivity as low as 3.0 μΩ m and metallic transport down to 100 mK. The resistivity remains higher than bulk Pt but is among the lowest reported for FEBID Pt wires, indicating that post-deposition annealing can render direct-write Pt nanowires viable for cryogenic nanoelectronics and quantum devices. The approach provides a practical pathway to high-purity, nanometer-scale Pt interconnects and gate leads for single-electron transistors and related technologies.

Abstract

We investigated the electrical conductivity of platinum nanowires with heights ranging from 2 nm to 200 nm, deposited by focused electron beam induced deposition (FEBID). Post-deposition processing was employed to enhance the electrical conductivity of the platinum nanowires. Thermal annealing of as-deposited nanowires in air at 225$^{\circ}$C for 4 hours increased electrical conductance by up to five orders of magnitude. After annealing, 22.5 $\mathrm{μm}$-long nanowires with a height of 36 nm exhibited resistances of approximately 10 k$Ω$. This nanowire underwent a reduction in height to one-quarter of its original value, a reduction in width to one half, and a reduction in cross-sectional area by approximately one order of magnitude. The platinum-to-carbon weight ratio increased from 35:65 to 85:15. The electrical resistance decreased monotonically as temperature was lowered from room temperature to 100 mK, confirming that annealed FEBID platinum nanowires are promising building blocks for nanoelectronic devices operating at millikelvin temperatures.

Figures (12)

• Figure 1: (a) Optical and (b) SEM micrographs of gold electrodes patterned on a SiO$_2$/Si substrate. There are twenty-four electrodes. Scale bar in (b) is 50 $\mu$m.
• Figure 2: SEM images of a FEBID-deposited nanowire with a nominal height of 133 nm: (a) before annealing (the nanowires are freshly deposited and the image is taken immediately afterward) and (b) after annealing (4 hours at 225$^{\circ}$C in air). The insets in (a) and (b) are magnified views. EDS spectra taken for a different nanowire with a length of 5 $\mu$m and a height of 50 nm (c) before and (d) after annealing. The nanowire was deposited at 5 kV and 690 pA.
• Figure 3: AFM topography images of Pt nanowires deposited under different beam conditions: (a) at 5 kV acceleration voltage and 690 pA beam current before annealing and (b) after annealing. (c) and (d) show the corresponding line profiles of the nanowires indicated by the white lines in (a) and (b). Similarly, AFM topography images of a Pt nanowire with a nominal height of 20 nm deposited at 2 kV acceleration voltage and 43 pA beam current are shown (e) before annealing and (f) after annealing, with their respective line profiles presented in (g) and (h).
• Figure 4: Multiple height profiles extracted from the AFM topography images of Pt nanowires. The thick red (blue) line represents the averaged topography of all profiles before (after) annealing. These plots reveal how the nanowire topography evolves with annealing. (a) Pt nanowire deposited at an acceleration voltage of 5 kV and 690 pA beam current with a nominal height of 133 nm and dwell time of 1.4 ms (Fig. \ref{['fig: afm_130nm_ba_aa']}a and b). (b) Pt nanowire deposited at an acceleration voltage of 2 kV and 43 pA beam current with nominal height 20 nm and dwell time of 1.4 ms (Fig. \ref{['fig: afm_130nm_ba_aa']}e and f). (c) Pt nanowire deposited at an acceleration voltage of 2 kV and 43 pA beam current with a dwell time of 1.4 ms and a single pass (see Supporting Fig. S4).
• Figure 5: Variation of nanowire dimensions with nominal height after annealing. (a) Measured height vs nominal height after annealing. (b) Width vs nominal height vs after annealing. (c) Cross-sectional area vs nominal height after annealing. Sample 1 and Sample 2 refer to two different sets of Pt nanowires with the same nominal dimensions but deposited on different substrates (for calculation details see Section S5).