Conductance Oscillations in a Topological Insulator-Disordered Superconductor Hybrid Interface

TL;DR

The work tackles proximity-induced superconductivity at a topological insulator–disordered superconductor interface by using BSTS coupled to low-density amorphous indium oxide (InO) and tuning via back-gate control. Transport and differential conductance measurements reveal a low-temperature resistance drop on BSTS despite InO remaining globally insulating, indicating surface-state–mediated pairing; a pronounced zero-bias conductance peak and quasi-periodic oscillations signify coherent quasiparticle interference in the proximity-coupled system. The oscillations and ZBC persist up to roughly 15 K, far above the global InO transition temperature, suggesting a higher local island pairing scale (T*) and strong superconducting fluctuations at the TI–disordered-superconductor interface. Gate-induced shifts of the Dirac point upon InO deposition confirm surface-state involvement, highlighting a rich interplay between topological surface states and superconductivity with implications for engineering topological superconductors.

Abstract

We report on the observation on proximity-induced superconductivity in the topological insulator BiSbTeSe2 coupled to a disordered superconductor, amorphous indium oxide (a-InO). Resistance temperature measurements reveal superconducting signatures at low temperatures, even when InO is in an insulating state, indicating the persistence of superconducting correlations. Differential conductance spectra reveal nearly periodic oscillations at higher bias, together with a pronounced zero-bias conductance peak. Both effect disappears at high temperature, marking the critical temperature (T*) of the superconducting islands in InO. These results underscore the influence of topological surface states on proximity-induced superconductivity and highlight the role of superconducting fluctuations in disordered superconductor/topological-insulator hybrid interfaces.

Figures (5)

• Figure 1: Sketches of the superconducting islands (left) and plot of resistance-temperature of InO sample when it is in insulating state (right).
• Figure 2: (a) The sheet resistance, $R_s$, is plotted as a function of temperature, $T$, for a BSTS flake with a thickness of 150 nm at $B=0$ T and $V_g=0$ V. The pink and yellow shaded regions indicate surface-dominated and bulk-dominated transport regimes, respectively. (b) $R_s$ vs $T$ of BSTS/InO bilayer at $B = 0$ T and $V_g = 0$ V. A resistance drop is observed at low temperatures, as highlighted in the zoomed - in view of the low-temperature data in the upper inset. The lower inset presents an optical image of the BSTS/InO bilayer, including electrical contacts.
• Figure 3: (a) Sheet Resistance, $R_s$ of bare BSTS (blue solid line) and bilayer BSTS/InO (red solid line) as a function of back gate voltage, $V_g$ at $B=0$ T and $T=1.7$ K. In the inset (lower panel), a typical device structure along with gate connection is shown.
• Figure 4: Differential conductance, $dI/dV$, of the BSTS/InO bilayer is plotted as a function of bias voltage, $V_{DC}$, at various gate voltages, $V_g$, for $T = 1.7$ K and $B = 0$ T. Note that a conductance peak is observed at $V_{DC} = 0$ V, indicative of enhanced Andreev reflection. Additionally, multiple conductance peaks appear at higher $V_{DC}$. For clarity, the data for $V_g = 0$ V is shown in the inset.
• Figure 5: Differential conductance, $dI/dV$ of BSTS/InO bilayer as a function of bias voltages, $V_{DC}$ at different temperature for $V_g=-170$ V and $B=0$ T.