Resistive Memory based Efficient Machine Unlearning and Continual Learning

TL;DR

The paper addresses the challenge of enabling efficient machine unlearning and continual learning on resistive-memory CIM accelerators, where analogue weight reprogramming is costly due to device variability. It introduces a hardware-software co-design with a hybrid analogue RM array storing pretrained weights and a digital LoRA-based adaptation unit in SRAM, ensuring updates are low-rank and hardware-friendly. The LoRA framework confines updates to a small set of parameters, reducing training and deployment overhead while preserving accuracy across face recognition, speaker authentication, and stylized image generation tasks. Fabricated in a 180 nm CMOS process, the RM-DLoRA prototype achieves up to 147.76x training cost reduction, up to 387.95x deployment overhead reduction, and up to 48.44x inference energy reduction, enabling secure edge neuromorphic intelligence.

Abstract

Resistive memory (RM) based neuromorphic systems can emulate synaptic plasticity and thus support continual learning, but they generally lack biologically inspired mechanisms for active forgetting, which are critical for meeting modern data privacy requirements. Algorithmic forgetting, or machine unlearning, seeks to remove the influence of specific data from trained models to prevent memorization of sensitive information and the generation of harmful content, yet existing exact and approximate unlearning schemes incur prohibitive programming overheads on RM hardware owing to device variability and iterative write-verify cycles. Analogue implementations of continual learning face similar barriers. Here we present a hardware-software co-design that enables an efficient training, deployment and inference pipeline for machine unlearning and continual learning on RM accelerators. At the software level, we introduce a low-rank adaptation (LoRA) framework that confines updates to compact parameter branches, substantially reducing the number of trainable parameters and therefore the training cost. At the hardware level, we develop a hybrid analogue-digital compute-in-memory system in which well-trained weights are stored in analogue RM arrays, whereas dynamic LoRA updates are implemented in a digital computing unit with SRAM buffer. This hybrid architecture avoids costly reprogramming of analogue weights and maintains high energy efficiency during inference. Fabricated in a 180 nm CMOS process, the prototype achieves up to a 147.76-fold reduction in training cost, a 387.95-fold reduction in deployment overhead and a 48.44-fold reduction in inference energy across privacy-sensitive tasks including face recognition, speaker authentication and stylized image generation, paving the way for secure and efficient neuromorphic intelligence at the edge.

Figures (5)

• Figure 1: Hardware-software co-design for LoRA-based machine unlearning and continual learning on a hybrid analogue-digital system.a, Machine learning models deployed on edge devices (for example, smart cameras) must support machine unlearning and continual learning to remove the influence of sensitive information contained in deleted data and to continually acquire knowledge from new data over time. b, Schematic of hippocampal synaptic plasticity. The hippocampus, a brain region central to memory formation, supports both learning and forgetting: during learning, synaptic transmission between pre- and postsynaptic neurons is strengthened, whereas over time this connection weakens, facilitating natural unlearning. c, Conceptual diagram of the proposed hardware-software co-design. The hybrid architecture combines analogue RM crossbar arrays, which store static pretrained backbone weights, with a digital compute unit incorporating an SRAM buffer that hosts lightweight LoRA branches for on-device machine unlearning and continual learning.
• Figure 2: Hybrid analogue-digital architecture and RM device characteristics for programming.a, Photograph of a 32 $\times$ 32 1T1R chip, optical micrograph of the RM array, and cross-sectional transmission electron microscopy (TEM) images of a 1-transistor-1-resistor (1T1R) cell and the RM stack. b, Quasi-static $I$-$V$ sweeps of an RM cell over 50 cycles, showing repeatable bipolar resistive switching. c, Endurance of an RM cell over 30,000 SET/RESET cycles. d, Single-shot SET programming of an RM cell into more than 128 conductance levels by varying the programming voltage. e, Time evolution of the programmed conductance over $10^{6}$ s, demonstrating stable readout. f, Programming trajectories for four RM cells with conductances tuned towards different target values. g, Target and programmed conductance maps encoding 'UL' (machine unlearning) and 'CL' (continual learning), programmed using a halting criterion that stops the write operation when the programming error is within a 2 $\mu$S tolerance. h, Relationship between the number of programming cycles per cell and the conductance error after programming (solid line, mean; shaded area, standard deviation).
• Figure 3: Learning, machine unlearning (UL) and continual learning (CL) for face classification on the Olivetti faces dataset.a, Schematic of the MLP-Mixer architecture mapped onto RM array for initial learning. b, Machine unlearning of face ID 2 using exemplar LoRA encoder and decoder modules. c, Continual learning of face ID 5 using exemplar LoRA encoder and decoder modules. d-f, Two-dimensional t-distributed stochastic neighbour embedding (t-SNE) visualizations of the embedding space after learning (d), machine unlearning (e) and continual learning (f). g, Classification accuracy obtained with the our hybrid RM with digital LoRA architecture (RM-DLoRA) and with fully analogue RM reprogramming baseline method, showing higher accuracy for RM-DLoRA owing to the avoidance of repeated analogue reprogramming in learn, machine unlearning (UL) and continual learning (CL) tasks. h, Training update cost for full-parameter fine-tuning on RM and RM-DLoRA, our method reducing training cost by about 36.68$\times$ and 27.15$\times$ in UL and CL tasks. i, Write-energy consumption for full-parameter fine-tuning on RM and RM-DLoRA, our method reducing write energy by about 92.91$\times$ and 69.68$\times$ in UL and CL tasks. j, Inference energy for RM-DLoRA and a GPU baseline, with RM-DLoRA achieving about 20.19$\times$, 25.43$\times$ and 12.48$\times$ lower energy consumption in learning (Learn), UL and CL tasks.
• Figure 4: Learning, machine unlearning and continual learning in an RSNN for speaker-authentication system on the Spiking Speech Commands dataset.a, Schematic of the recurrent spiking neural network (RSNN) architecture. Audio signals from the Spiking Speech Commands dataset are converted into spike trains, accumulated over ten time windows and fed into the recurrent hidden layer of RSNN. b, Distributions of LoRA encoder and decoder weights during machine unlearning of speaker ID 1. c, Distributions of LoRA encoder and decoder weights during continual learning of a new speaker (ID 5). d-f, Two-dimensional t-SNE visualizations of readout-layer activations after learning (d), machine unlearning (e) and continual learning (f). g, Per-speaker classification accuracy for RM with digital LoRA updates (RM-DLoRA) and conventional RM program updates, showing that RM-DLoRA mitigates accuracy degradation caused by noise and conductance drift during repeated analogue reprogramming in learn, UL and CL tasks. h, Training-update cost for RM-DLoRA and RM by full-parameter fine-tuning, with RM-DLoRA updates reducing the number of training update operations by about 25.16$\times$ for UL and CL tasks. i, Write-energy consumption for RM-DLoRA and RM by full-parameter fine-tuning, with RM-DLoRA updates reducing write energy by about 63.74$\times$ for UL and CL tasks by avoiding repeated reprogramming of the RM array. j, Inference energy for RM-DLoRA and a high-performance GPU, with RM-DLoRA achieving up to 12.03$\times$ (and at least 6.13$\times$) lower energy consumption across learning (Learn), UL and CL.
• Figure 5: Learning, machine unlearning and continual learning in a conditional diffusion model on the UnlearnCanvas dataset.a, Architecture of the latent diffusion model. RGB images of size 128$\times$128$\times$3 are encoded by a variational autoencoder (VAE) into 16$\times$16$\times$4 latent representations, which are partitioned into 2$\times$2 patches and fed as latent sequences to a DiT-B/2 backbone. Standard attention layers are replaced by depth-wise convolutional layers to improve efficiency. Image generation is performed by iterative denoising over 100 sampling steps. In the initial learning stage, the model is trained on four artistic styles (Expressionism, Dadaism, Cartoon and Abstractionism). b, Machine unlearning of two styles (Cartoon and Abstractionism), revoking the corresponding generative capabilities. c, Continual learning of two new styles (Impressionism and Monet), extending the model's repertoire without catastrophic forgetting. d, Representative samples generated after learning, machine unlearning and continual learning, showing preservation of image content with appropriate application or suppression of the target styles. e, Perceptual generation quality, measured by the Learned Perceptual Image Patch Similarity (LPIPS) metric (lower is better), comparing a full RM program-update baseline and RM-DLoRA; RM-DLoRA achieves comparable quality. f, Training update cost across the UL and CL tasks, with RM-DLoRA reducing the number of trainable-parameter updates by about 147.76$\times$ relative to full-parameter fine-tuning for RM. g, Write energy consumption, RM-DLoRA reducing write energy by about 387.95$\times$ for UL and CL by avoiding repeated analogue reprogramming of the RM array. h, Inference energy consumption for RM-DLoRA and a high-performance GPU, showing 48.44$\times$, 48.44$\times$ and 36.19$\times$ lower energy for RM-DLoRA across learning (Learn), UL and CL tasks.