Time-Dynamic Circuits for Fault-Tolerant Shift Automorphisms in Quantum LDPC Codes
Younghun Kim, Spiro Gicev, Martin Sevior, Muhammad Usman
TL;DR
The paper addresses the challenge of implementing fault-tolerant shift automorphisms in qLDPC codes, where SWAP-based approaches incur large logical error rates and time overhead. It introduces time-dynamic syndrome extraction circuits that realize shift automorphisms during syndrome measurements, preserving circuit distance. Through benchmarks on weight-6 generalized toric codes (including twisted/untwisted and the gross code), the authors show shift circuits dramatically reduce logical error rates compared with SWAP-based methods and approach the performance of idle memory, with a measured ~$38$-fold improvement at $p=10^{-3}$ for the gross code and a near-memory-like performance with a ratio of about $1.7$. The work highlights a practical path toward implementing logical Pauli measurements in qLDPC architectures and paves the way for leakage-removal schemes and broader adoption beyond surface codes, with potential decoder and hardware adaptations to further optimize performance.
Abstract
Quantum low-density parity-check (qLDPC) codes have emerged as a promising approach for realizing low-overhead logical quantum memories. Recent theoretical developments have established shift automorphisms as a fundamental building block for completing the universal set of logical gates for qLDPC codes. However, practical challenges remain because the existing SWAP-based shift automorphism yields logical error rates that are orders of magnitude higher than those for fault-tolerant idle operations. In this work, we address this issue by dynamically varying the syndrome measurement circuits to implement the shift automorphisms without reducing the circuit distance. We benchmark our approach on both twisted and untwisted weight-6 generalized toric codes, including the gross code family. Our time-dynamic circuits for shift automorphisms achieve performance comparable to the idle operations under the circuit-level noise model (SI1000). Specifically, the dynamic circuits achieve more than an order of magnitude reduction in logical error rates relative to the SWAP-based scheme for the gross code at a physical error rate of $10^{-3}$, employing the BP-OSD decoder. Our findings improve both the error resilience and the time overhead of the shift automorphisms in qLDPC codes. Furthermore, our work can lead to alternative syndrome extraction circuit designs, such as leakage removal protocols, providing a practical pathway to utilizing dynamic circuits that extend beyond surface codes towards qLDPC codes.
