Toolchain for shuttling trapped-ion qubits in segmented traps
Andreas Conta, Santiago Bogino, Frodo Köhncke, Ferdinand Schmidt-Kaler, Ulrich Poschinger
TL;DR
The paper tackles the challenge of fast, low-excitation shuttling of trapped-ion qubits through complex, segmented RF traps. It introduces a hardware-informed numerical toolchain that combines an electrostatics solver with a spherical-harmonic multipole expansion, penalty-based unconstrained quadratic optimization, and postprocessing to generate voltage waveforms compatible with multi-channel AWGs. The framework is validated against measured secular frequencies and demonstrated on linear shuttling and junction traversal, with detailed assessments of accuracy and performance. By enabling rapid prototyping and design optimization of trap geometries and transport protocols, this work provides a scalable foundation for advancing trapped-ion quantum processors toward larger registers and practical fault-tolerant operation.
Abstract
Scalable trapped-ion quantum computing requires fast and reliable transport of ions through complex, segmented radiofrequency trap architectures without inducing excessive motional excitation. We present a numerical toolchain for the systematic generation of time-dependent electrode voltages enabling fast, low-excitation ion shuttling in segmented radiofrequency traps. Based on a model of the trap electrode geometry, the framework combines an electrostatic field solver, efficient unconstrained optimization, waveform postprocessing, and dynamical simulations of ion motion to compute voltage waveforms that realize prescribed transport trajectories while respecting experimental constraints such as voltage limits and bandwidth. The toolchain supports arbitrary trap geometries, including junctions and multi-zone layouts, and allows for the flexible incorporation of optimization objectives. We provide a detailed assessment of the accuracy of the framework by investigating its numerical stability and by comparing measured and predicted secular frequencies. The framework is optimized for numerical performance, enabling rapid numerical prototyping of trap architectures of increasing complexity. As application examples, we apply the framework to the transport of a potential well along a linear, uniformly segmented trap, and we compute a solution for shuttling a potential well around the corner of an X-type trap junction. The presented approach provides an extensible and highly efficient numerical foundation for designing and validating transport protocols in current and next-generation trapped-ion processors.
