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Optimizing Fault-tolerant Cat State Preparation

Tom Peham, Erik Weilandt, Robert Wille

TL;DR

This work tackles fault-tolerant preparation of large cat states, a key resource for FTQC, by proposing a scheme that uses two low-depth cat states, a single transversal CNOT layer, and post-selection to achieve FT up to fault distance $t=9$ with depth $\lceil \log_2 w\rceil+1$ and linear resource costs. Central to the approach is the precise wiring of the transversal CNOT between the two cat states, ensuring that high-weight error patterns do not cancel and evade detection; the authors develop three complementary methods—SAT/SMT-based direct wiring, CEGAR-driven joint control/permutation search, and a heuristic local repair—to synthesize fault-tolerant connections. Through extensive circuit-level simulations, they demonstrate that their transversal constructions require fewer qubits and CNOTs and achieve higher acceptance rates and lower error rates than a state-of-the-art recursive construction, particularly for larger cat-state sizes and higher fault distances. The methods presented, especially the CEGAR approach, offer a scalable path to fault-tolerant state preparation and may be applicable to other fault-tolerant gadgets beyond cat-state preparation.

Abstract

Cat states are an important resource for fault-tolerant quantum computing, where they serve as building blocks for a variety of fault-tolerant primitives. Consequently, the ability to prepare high-quality cat states at large fault distances is essential. While optimizations for low fault distances or small numbers of qubits exist, higher fault distances can be achieved via generalized constructions with potentially suboptimal circuit sizes. In this work, we propose a cat state preparation scheme based on preparing two cat states with low-depth circuits, followed by a transversal CNOT and measurement of one of the states. This scheme prepares $w$-qubit cat states fault-tolerantly up to fault distances of $9$ using $\lceil\log_2 w\rceil+1$ depth and at most $3w-2$ CNOTs and $2w$ qubits. We discuss that the combinatorially challenging aspect of this construction is the precise wiring of the transversal CNOT and propose three methods for finding these: two based on Satisfiability Modulo Theory solving and one heuristic search based on a local repair strategy. Numerical evaluations show that our circuits achieve a high fault-distance while requiring fewer resources as generalized constructions.

Optimizing Fault-tolerant Cat State Preparation

TL;DR

This work tackles fault-tolerant preparation of large cat states, a key resource for FTQC, by proposing a scheme that uses two low-depth cat states, a single transversal CNOT layer, and post-selection to achieve FT up to fault distance with depth and linear resource costs. Central to the approach is the precise wiring of the transversal CNOT between the two cat states, ensuring that high-weight error patterns do not cancel and evade detection; the authors develop three complementary methods—SAT/SMT-based direct wiring, CEGAR-driven joint control/permutation search, and a heuristic local repair—to synthesize fault-tolerant connections. Through extensive circuit-level simulations, they demonstrate that their transversal constructions require fewer qubits and CNOTs and achieve higher acceptance rates and lower error rates than a state-of-the-art recursive construction, particularly for larger cat-state sizes and higher fault distances. The methods presented, especially the CEGAR approach, offer a scalable path to fault-tolerant state preparation and may be applicable to other fault-tolerant gadgets beyond cat-state preparation.

Abstract

Cat states are an important resource for fault-tolerant quantum computing, where they serve as building blocks for a variety of fault-tolerant primitives. Consequently, the ability to prepare high-quality cat states at large fault distances is essential. While optimizations for low fault distances or small numbers of qubits exist, higher fault distances can be achieved via generalized constructions with potentially suboptimal circuit sizes. In this work, we propose a cat state preparation scheme based on preparing two cat states with low-depth circuits, followed by a transversal CNOT and measurement of one of the states. This scheme prepares -qubit cat states fault-tolerantly up to fault distances of using depth and at most CNOTs and qubits. We discuss that the combinatorially challenging aspect of this construction is the precise wiring of the transversal CNOT and propose three methods for finding these: two based on Satisfiability Modulo Theory solving and one heuristic search based on a local repair strategy. Numerical evaluations show that our circuits achieve a high fault-distance while requiring fewer resources as generalized constructions.
Paper Structure (18 sections, 28 equations, 8 figures, 2 tables, 1 algorithm)

This paper contains 18 sections, 28 equations, 8 figures, 2 tables, 1 algorithm.

Figures (8)

  • Figure 1: Fault-tolerant cat state preparation. (a) Non-fault-tolerant log-depth preparation of an 8-qubit cat state. A single weight-1 error propagates to a weight-four error on the prepared state. (b) Errors on the data cat state can be detected by an ancilla cat state by copying the $X$ errors to the ancilla and measuring in the $Z$ basis. Here this is not fault-tolerant as two errors are undedected and lead to a weight-four error on the data qubits. (c) The error detection gadget can be made fault-tolerant against 4 errors by changing the connectivity of the transversal CNOT. (d) Qubit overhead can be reduced by using a smaller ancillary cat state; a 6-qubit cat state with an appropriately connected transversal CNOT is sufficient.
  • Figure 2: $\mathrm{FT}^{2}$ cat state preparation.
  • Figure 3: Fault-tolerance check: precomputing what errors on the ancilla can cancel with the worst-case errors on the data qubit allows for fast checking of fault-tolerance based on the permutation $\sigma$.
  • Figure 4: Constructing $\mathrm{FT}^{t}$ partial transversal CNOTs for cat state preparation using CEGAR. An initial SAT formula $\Phi$ is iteratively refined by adding blocking clauses forbidding counterexamples until satisfiability is decided.
  • Figure 5: Comparison of Circuit Metrics for Cat State Preparation Circuits for different cat state sizes and fault distance. "transversal" corresponds to the proposed construction and "recursive" corresponds to the construction from Ref. rodatzFaultToleranceConstruction2025
  • ...and 3 more figures

Theorems & Definitions (6)

  • Definition 1
  • Example 1
  • Example 2
  • Definition 2
  • Example 3
  • Example 4