FTCircuitBench: A Benchmark Suite for Fault-Tolerant Quantum Compilation and Architecture

TL;DR

FTCircuitBench addresses the lack of standardized benchmarks for fault-tolerant quantum computation by providing an open-source benchmark suite and end-to-end tooling that translate high-level algorithms into Clifford+T and Pauli-Based Computation representations. It couples canonical QEC models (surface code and high-rate qLDPC BB codes) with two primary fault-tolerant compilation paths (Clifford+T and PBC), enabling systematic evaluation of decomposition quality, resource overhead, and architectural fit. The framework introduces robust metrics across both representations (gate counts, interaction graphs, Pauli weights, T-gate statistics) and supports a diverse set of workloads, including quantum simulation, arithmetic, QFT, phase estimation, linear systems, and QSVT-based tasks, to reveal co-design trade-offs. By exposing baseline, unoptimized circuits and a modular pipeline that can be extended with custom passes, FTCircuitBench aims to accelerate the development of efficient FTQC compilers and hardware-aware optimizations, with practical impact on resource estimation and architecture decisions in the quantum era.

Abstract

Realizing large-scale quantum advantage is expected to require quantum error correction (QEC), making the compilation and optimization of logical operations a critical area of research. Logical computation imposes distinct constraints and operational paradigms that differ from those of the Noisy Intermediate-Scale Quantum (NISQ) regime, motivating the continued evolution of compilation tools. Given the complexity of this emerging stack, where factors such as gate decomposition precision and computational models must be co-designed, standardized benchmarks and toolkits are valuable for evaluating progress. To support this need, we introduce FTCircuitBench, which serves as: (1) a benchmark suite of impactful quantum algorithms, featuring pre-compiled instances in both Clifford+T and Pauli Based Computation models; (2) a modular end-to-end pipeline allowing users to compile and decompose algorithms for various fault-tolerant architectures, supporting both prebuilt and custom optimization passes; and (3) a toolkit for evaluating the impact of algorithms and optimization across the full compilation stack, providing detailed numerical analysis at each stage. FTCircuitBench is fully open-sourced and maintained on Github.

Figures (12)

• Figure 1: Left: Rotated surface code layout. White nodes denote data qubits; red (blue) nodes denote $X$-type ($Z$-type) stabilizer measurement qubits. Colored plaquettes indicate stabilizer generators: red corresponds to $XXXX$ (or $XX$) and blue to $ZZZZ$ (or $ZZ$). Logical operators are strings of data qubits running along the highlighted red/blue paths. Qubits are arranged on a 2D grid, requiring only local connectivity between each plaquette’s data-qubit vertices and its central stabilizer qubit. Right: Example syndrome-extraction circuit measuring the indicated $X$ or $Z$ stabilizers, assuming all state initialization and measurements are performed in the $Z$ basis.
• Figure 2: (a) Measurement absorption Rule: A Clifford rotation immediately before readout can be absorbed into the final measurement: if it commutes with the chosen measurement basis, it is eliminated; otherwise, the measurement basis is updated accordingly. (b) Commutation Rule: Moving a Clifford (purple) past a $T$ rotation (blue) is free when they commute; if not, the $T$-frame changes the measured Pauli from $P$ to $P' = T P T^\dagger$ (up to a phase, e.g., $iPP'$). (c) $T$ rotation implementation: Realize $T$ rotation by consuming a $|T\rangle$ ancilla state: perform a joint measurement $P \otimes Z$ between data and ancilla, then apply a conditional Clifford correction (which can be commuted to the end of the circuit). Finally, measure the ancilla and apply the required Pauli correction by recording a Pauli-frame update in software.
• Figure 3: (a) $T$-gadgetzhou2000methodologybravyi2016improved: realizes a logical $T$ on the surface code by consuming a high-fidelity $|T\rangle$ state via a CNOT and measurements; with 50% probability an $S$ correction is applied to convert $T^\dagger$ to $T$. (b) $S$-gadget: analogous construction using a $|Y\rangle$ resource to implement the logical $S$ gate. (c) Logical CNOT by lattice surgery: a three-step lattice surgery protocol employing an ancilla patch to set the measurement basis and mediate the entangling operation.
• Figure 4: FTCircuitBench overview. The pipeline begins by loading a quantum algorithm and performing an initial transpilation into a Clifford plus $R_z(\theta)$ gate decomposition. Two synthesis pathways can be applied: Solovay-Kitaev decomposition with adjustable recursion degree and Gridsynth transpilation with adjustable precision for approximating single-qubit $R_z$ rotations in the Clifford+T basis. The resulting Clifford+T circuit can then be written as a PBC circuit by appropriately commuting all Clifford gates past the T-gates and absorbing them in the measurement basis. Transpiled circuits and statistics on both circuit representations, as well as any optimization metrics, are then saved.
• Figure 5: Clifford+T gate counts of FTCircuitBench circuits.